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Message-Id: <EEB967E2-D2E3-409F-8D47-3F6ABB5E1BCE@collabora.com>
Date: Fri, 25 Jul 2025 13:20:29 -0300
From: Daniel Almeida <daniel.almeida@...labora.com>
To: Alexandre Courbot <acourbot@...dia.com>
Cc: Danilo Krummrich <dakr@...nel.org>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Beata Michalska <beata.michalska@....com>,
nouveau@...ts.freedesktop.org,
dri-devel@...ts.freedesktop.org,
rust-for-linux@...r.kernel.org,
linux-kernel@...r.kernel.org,
Timur Tabi <ttabi@...dia.com>
Subject: Re: [PATCH v2 03/19] gpu: nova-core: register: allow fields named
`offset`
> On 18 Jul 2025, at 04:26, Alexandre Courbot <acourbot@...dia.com> wrote:
>
> `offset` is a common field name, yet using it triggers a build error due
> to the conflict between the uppercased field constant (which becomes
> `OFFSET` in this case) containing the bitrange of the field, and the
> `OFFSET` constant constaining the offset of the register.
>
> Fix this by adding `_RANGE` the field's range constant to avoid the
> name collision.
>
> Reported-by: Timur Tabi <ttabi@...dia.com>
> Signed-off-by: Alexandre Courbot <acourbot@...dia.com>
> ---
> drivers/gpu/nova-core/regs.rs | 4 ++--
> drivers/gpu/nova-core/regs/macros.rs | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
> index 5ccfb61f850ac961be55841416ca21775309ea32..2df784f704d57b6ef31486afa0121c5cd83bb8b9 100644
> --- a/drivers/gpu/nova-core/regs.rs
> +++ b/drivers/gpu/nova-core/regs.rs
> @@ -28,7 +28,7 @@ impl NV_PMC_BOOT_0 {
> /// Combines `architecture_0` and `architecture_1` to obtain the architecture of the chip.
> pub(crate) fn architecture(self) -> Result<Architecture> {
> Architecture::try_from(
> - self.architecture_0() | (self.architecture_1() << Self::ARCHITECTURE_0.len()),
> + self.architecture_0() | (self.architecture_1() << Self::ARCHITECTURE_0_RANGE.len()),
> )
> }
>
> @@ -36,7 +36,7 @@ pub(crate) fn architecture(self) -> Result<Architecture> {
> pub(crate) fn chipset(self) -> Result<Chipset> {
> self.architecture()
> .map(|arch| {
> - ((arch as u32) << Self::IMPLEMENTATION.len()) | self.implementation() as u32
> + ((arch as u32) << Self::IMPLEMENTATION_RANGE.len()) | self.implementation() as u32
> })
> .and_then(Chipset::try_from)
> }
> diff --git a/drivers/gpu/nova-core/regs/macros.rs b/drivers/gpu/nova-core/regs/macros.rs
> index 93e9055d5ebd5f78ea534aafd44d884da0fce345..d015a9f8a0b01afe1ff5093991845864aa81665e 100644
> --- a/drivers/gpu/nova-core/regs/macros.rs
> +++ b/drivers/gpu/nova-core/regs/macros.rs
> @@ -278,7 +278,7 @@ impl $name {
> { $process:expr } $to_type:ty => $res_type:ty $(, $comment:literal)?;
> ) => {
> ::kernel::macros::paste!(
> - const [<$field:upper>]: ::core::ops::RangeInclusive<u8> = $lo..=$hi;
> + const [<$field:upper _RANGE>]: ::core::ops::RangeInclusive<u8> = $lo..=$hi;
> const [<$field:upper _MASK>]: u32 = ((((1 << $hi) - 1) << 1) + 1) - ((1 << $lo) - 1);
> const [<$field:upper _SHIFT>]: u32 = Self::[<$field:upper _MASK>].trailing_zeros();
> );
>
> --
> 2.50.1
>
>
Reviewed-by: Daniel Almeida <daniel.almeida@...labora.com>
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