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Message-Id: <66ad07fe-3aa5-496c-8c5b-1b7ed18eb056@app.fastmail.com>
Date: Sat, 26 Jul 2025 12:31:12 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Linus Torvalds" <torvalds@...ux-foundation.org>
Cc: linux-kernel@...r.kernel.org, soc@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org
Subject: [GIT PULL 0/5] soc: new SoC support for 6.17
The following changes since commit 86731a2a651e58953fc949573895f2fa6d456841:
Linux 6.16-rc3 (2025-06-22 13:30:08 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/soc-newsoc-6.17
for you to fetch changes up to 05a623030b3cc2250755e4d4d6b1440a03aed674:
Merge tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux into soc/newsoc (2025-07-23 22:19:15 +0200)
----------------------------------------------------------------
soc: new SoC support for 6.17
These five newly supported chips come with both devicetree descriptions
and the changes to wire them up to the build system for easier bisection.
The chips in question are:
- Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell
in the product line that started with the Digital StrongARM SA1100
based PDAs and continued with the Intel PXA2xx that dominated early
smartphones. This one only made it only into a few products before the
entire product line was cut in 2015.
- The QiLai SoC is made by RISC-V core designer Andes Technologies
and is in the 'Voyager' reference board in MicroATX form factor.
It uses four in-order AX45MP cores, which is the midrange product
from Andes.
- CIX P1 is one of the few Arm chips designed for small workstations,
and this one uses 12 Cortex-A720/A520 cores, making it also one
of the only ARMv9.2 machines that one can but at the moment.
- Axiado AX3000 is an embedded chip with relative small Cortex-A53
CPU cores described as a "Trusted Control/Compute Unit" that can
be used as a BMC in servers. In addition to the usual I/O, this one
comes with 10GBit ethernet and and a 4TOPS NPU.
- Sophgo SG2000 is an embedded chip that comes with both RISC-V
and Arm cores that can run Linux. This was already supported for
RISC-V but now it also works on Arm
One more chip, the Black Sesame C1200 did not make it in tirm for the
merge window.
----------------------------------------------------------------
Alexander Sverdlin (5):
arm64: dts: sophgo: Add initial SG2000 SoC device tree
arm64: dts: sophgo: Add Duo Module 01
arm64: dts: sophgo: Add Duo Module 01 Evaluation Board
arm64: Add SOPHGO SOC family Kconfig support
arm64: defconfig: Enable rudimentary Sophgo SG2000 support
Arnd Bergmann (5):
Merge branch 'newsoc/pxa1908' into soc/newsoc
Merge branch 'newsoc/andes' into soc/newsoc
Merge branch 'newsoc/cix-p1' into soc/newsoc
Merge branch 'newsoc/axiado' into soc/newsoc
Merge tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux into soc/newsoc
Ben Zong-You Xie (9):
riscv: add Andes SoC family Kconfig support
dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings
dt-bindings: interrupt-controller: add Andes QiLai PLIC
dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller
dt-bindings: timer: add Andes machine timer
riscv: dts: andes: add QiLai SoC device tree
riscv: dts: andes: add Voyager board device tree
riscv: defconfig: enable Andes SoC
MAINTAINERS: Add entry for Andes SoC
Duje Mihanović (5):
dt-bindings: mmc: sdhci-pxa: restrict pinctrl to pxav1
dt-bindings: marvell: Document PXA1908 SoC and samsung,coreprimevelte
arm64: Kconfig.platforms: Add config for Marvell PXA1908 platform
arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte
MAINTAINERS: add myself as Marvell PXA1908 maintainer
Fugang Duan (1):
arm64: Kconfig: add ARCH_CIX for cix silicons
Gary Yang (1):
dt-bindings: clock: cix: Add CIX sky1 scmi clock id
Guomin Chen (2):
dt-bindings: mailbox: add cix,sky1-mbox
mailbox: add CIX mailbox driver
Harshit Shah (10):
dt-bindings: vendor-prefixes: Add Axiado Corporation
dt-bindings: arm: axiado: add AX3000 EVK compatible strings
dt-bindings: gpio: cdns: convert to YAML
dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
dt-bindings: serial: cdns: add Axiado AX3000 UART controller
dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
arm64: add Axiado SoC family
arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
arm64: defconfig: enable the Axiado family
MAINTAINERS: Add entry for Axiado
Peter Chen (5):
dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd.
dt-bindings: arm: add CIX P1 (SKY1) SoC
arm64: defconfig: Enable CIX SoC
arm64: dts: cix: Add sky1 base dts initial support
MAINTAINERS: Add CIX SoC maintainer entry
Documentation/devicetree/bindings/arm/axiado.yaml | 23 +
Documentation/devicetree/bindings/arm/cix.yaml | 26 +
.../devicetree/bindings/arm/mrvl/mrvl.yaml | 5 +
.../devicetree/bindings/gpio/cdns,gpio.txt | 43 --
.../devicetree/bindings/gpio/cdns,gpio.yaml | 84 +++
.../devicetree/bindings/i3c/cdns,i3c-master.yaml | 7 +-
.../interrupt-controller/andestech,plicsw.yaml | 54 ++
.../interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
.../devicetree/bindings/mailbox/cix,sky1-mbox.yaml | 77 +++
.../devicetree/bindings/mmc/sdhci-pxa.yaml | 36 +-
Documentation/devicetree/bindings/riscv/andes.yaml | 25 +
.../devicetree/bindings/serial/cdns,uart.yaml | 7 +-
.../devicetree/bindings/timer/andestech,plmt0.yaml | 53 ++
.../devicetree/bindings/vendor-prefixes.yaml | 4 +
MAINTAINERS | 38 ++
arch/arm64/Kconfig.platforms | 26 +
arch/arm64/boot/dts/Makefile | 3 +
arch/arm64/boot/dts/axiado/Makefile | 2 +
arch/arm64/boot/dts/axiado/ax3000-evk.dts | 79 +++
arch/arm64/boot/dts/axiado/ax3000.dtsi | 520 +++++++++++++++++
arch/arm64/boot/dts/cix/Makefile | 2 +
arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 39 ++
arch/arm64/boot/dts/cix/sky1.dtsi | 330 +++++++++++
arch/arm64/boot/dts/marvell/Makefile | 2 +
arch/arm64/boot/dts/marvell/mmp/Makefile | 2 +
.../marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 331 +++++++++++
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 300 ++++++++++
arch/arm64/boot/dts/sophgo/Makefile | 2 +
.../dts/sophgo/sg2000-milkv-duo-module-01-evb.dts | 76 +++
.../dts/sophgo/sg2000-milkv-duo-module-01.dtsi | 40 ++
arch/arm64/boot/dts/sophgo/sg2000.dtsi | 86 +++
arch/arm64/configs/defconfig | 7 +
arch/riscv/Kconfig.socs | 7 +
arch/riscv/boot/dts/Makefile | 1 +
arch/riscv/boot/dts/andes/Makefile | 2 +
arch/riscv/boot/dts/andes/qilai-voyager.dts | 28 +
arch/riscv/boot/dts/andes/qilai.dtsi | 186 ++++++
arch/riscv/configs/defconfig | 1 +
drivers/mailbox/Kconfig | 10 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/cix-mailbox.c | 645 +++++++++++++++++++++
include/dt-bindings/clock/cix,sky1.h | 279 +++++++++
42 files changed, 3428 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/axiado.yaml
create mode 100644 Documentation/devicetree/bindings/arm/cix.yaml
delete mode 100644 Documentation/devicetree/bindings/gpio/cdns,gpio.txt
create mode 100644 Documentation/devicetree/bindings/gpio/cdns,gpio.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,plicsw.yaml
create mode 100644 Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml
create mode 100644 Documentation/devicetree/bindings/riscv/andes.yaml
create mode 100644 Documentation/devicetree/bindings/timer/andestech,plmt0.yaml
create mode 100644 arch/arm64/boot/dts/axiado/Makefile
create mode 100644 arch/arm64/boot/dts/axiado/ax3000-evk.dts
create mode 100644 arch/arm64/boot/dts/axiado/ax3000.dtsi
create mode 100644 arch/arm64/boot/dts/cix/Makefile
create mode 100644 arch/arm64/boot/dts/cix/sky1-orion-o6.dts
create mode 100644 arch/arm64/boot/dts/cix/sky1.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/mmp/Makefile
create mode 100644 arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
create mode 100644 arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
create mode 100644 arch/arm64/boot/dts/sophgo/Makefile
create mode 100644 arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01-evb.dts
create mode 100644 arch/arm64/boot/dts/sophgo/sg2000-milkv-duo-module-01.dtsi
create mode 100644 arch/arm64/boot/dts/sophgo/sg2000.dtsi
create mode 100644 arch/riscv/boot/dts/andes/Makefile
create mode 100644 arch/riscv/boot/dts/andes/qilai-voyager.dts
create mode 100644 arch/riscv/boot/dts/andes/qilai.dtsi
create mode 100644 drivers/mailbox/cix-mailbox.c
create mode 100644 include/dt-bindings/clock/cix,sky1.h
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