linux-kernel - Re: [PATCH v6 0/3] riscv: canaan: Add support for K230-Canmv clock

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Message-ID: <cde19d45-fbd6-4b8c-b04f-e34811d62ae8@zohomail.com>
Date: Sat, 26 Jul 2025 13:22:46 +0800
From: Xukai Wang <kingxukai@...omail.com>
To: Stephen Boyd <sboyd@...nel.org>, Albert Ou <aou@...s.berkeley.edu>,
 Conor Dooley <conor+dt@...nel.org>, Conor Dooley <conor@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Michael Turquette <mturquette@...libre.com>,
 Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley
 <paul.walmsley@...ive.com>, Rob Herring <robh@...nel.org>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
 Samuel Holland <samuel.holland@...ive.com>,
 Troy Mitchell <TroyMitchell988@...il.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v6 0/3] riscv: canaan: Add support for K230-Canmv clock


On 2025/7/25 06:13, Stephen Boyd wrote:
> Quoting Xukai Wang (2025-07-13 09:48:44)
>> I'm working on a Linux clock driver and have encountered a question
>> regarding how to properly represent a particular type of clock source.
>>
>> In K230 SoC, there's a mux clock whose parent can optionally be an
>> external pulse signal, which is counted via a pin (the input is not
>> generated internally but comes from an external source). I’m wondering:
>>
>> Should this external pulse signal be modeled as a clock within the
>> Common Clock Framework (CCF)?
> Likely, yes.
>
>> If so, what would be the correct way to register or describe such a
>> clock in the driver?
> If it is a fixed rate pulse signal I would use a fixed rate clk node at
> the root of the DT tree:
>
> 	clock-50000 {
> 		compatible = "fixed-clock";
> 		#clock-cells = <0>;
> 		clock-frequency = <50000>;
> 	}
>
> If you need pinctrl settings to make that clk work you can assign them
> in that node, although I don't know if I've ever seen such a case
> before. 
Thanks for your reply and helpful explanation!

Regarding the timer-pulse-in, the documentation describes it as:

"can be used to count external input signal with frequency less than
1MHz and duty cycle from 0~100%"

So the input frequency is not fixed in practice.

Given that, modeling it as a fixed-rate clock might not be accurate.

And I'm considering whether a more feature-rich driver is needed to
handle the dynamically changing external clock, or if there's a better
way to describe such a clock in the CCF.

> If the external parent clk needs to be gated you'll need to
> write a more featured driver, unless it can be controlled with a gpio or
> something like that.
and I think it doesn't need to be gated.