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Message-ID: <20250727160731.106312-1-biju.das.jz@bp.renesas.com>
Date: Sun, 27 Jul 2025 17:07:25 +0100
From: Biju <biju.das.au@...il.com>
To: Wolfram Sang <wsa+renesas@...g-engineering.com>,
Ulf Hansson <ulf.hansson@...aro.org>
Cc: Biju Das <biju.das.jz@...renesas.com>,
linux-mmc@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
linux-kernel@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
Biju Das <biju.das.au@...il.com>
Subject: [PATCH v2 0/2] Enable 64-bit polling mode for R-Car Gen3 and RZ/G2+ family
From: Biju Das <biju.das.jz@...renesas.com>
As per the RZ/{G2L,G3E} HW manual SD_BUF0 can be accessed by 16/32/64
bits. Most of the data transfer in SD/SDIO/eMMC mode is more than 8 bytes.
During testing it is found that, if the DMA buffer is not aligned to 128
bit it fallback to PIO mode. In such cases, 64-bit access is much more
efficient than the current 16-bit.
RFT->v2:
* Collected tags
* Fixed the build error reported by the bot.
Biju Das (2):
mmc: tmio: Add 64-bit read/write support for SD_BUF0 in polling mode
mmc: renesas_sdhi: Enable 64-bit polling mode
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 3 +-
drivers/mmc/host/tmio_mmc.h | 14 ++++++++
drivers/mmc/host/tmio_mmc_core.c | 33 +++++++++++++++++++
include/linux/platform_data/tmio.h | 3 ++
4 files changed, 52 insertions(+), 1 deletion(-)
--
2.43.0
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