linux-kernel - Re: [PATCH v7 1/2] dt-bindings: usb: dwc3: add support for SpacemiT K1

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Message-ID: <6479ef96-b7d3-40f6-aafc-a7a8a4177c41@linaro.org>
Date: Tue, 29 Jul 2025 08:18:15 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Ze Huang <huangze@...t.edu.cn>, Yao Zi <ziyao@...root.org>,
 Ze Huang <huang.ze@...ux.dev>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Yixun Lan <dlan@...too.org>,
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
 Philipp Zabel <p.zabel@...gutronix.de>
Cc: linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
 linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 1/2] dt-bindings: usb: dwc3: add support for SpacemiT
 K1

On 29/07/2025 07:58, Ze Huang wrote:
> On Tue, Jul 29, 2025 at 01:41:01AM +0000, Yao Zi wrote:
>> On Tue, Jul 29, 2025 at 12:33:55AM +0800, Ze Huang wrote:
>>> Add support for the USB 3.0 Dual-Role Device (DRD) controller embedded
>>> in the SpacemiT K1 SoC. The controller is based on the Synopsys
>>> DesignWare Core USB 3 (DWC3) IP, supporting USB3.0 host mode and USB 2.0
>>> DRD mode.
>>>
>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>>> Signed-off-by: Ze Huang <huang.ze@...ux.dev>
>>> ---
>>>  .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml  | 124 +++++++++++++++++++++
>>>  1 file changed, 124 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
>>> new file mode 100644
>>> index 0000000000000000000000000000000000000000..7007e2bd42016ae0e50c4007e75d26bada34d983
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
>>> @@ -0,0 +1,124 @@
>>
>> ...
>>
>>> +  resets:
>>> +    items:
>>> +      - description: USB3.0 AHB reset
>>> +      - description: USB3.0 VCC reset
>>> +      - description: USB3.0 PHY reset
>>> +      - description: PCIE0 global reset (for combo phy)
>>
>> Why should the USB driver takes care of the PCIe stuff? This sounds
>> strange to me.
>>
> 
> On K1, PHY depends on the clocks and resets it shares with the controller,
> and the controller driver is guarantees that any needed clocks are enabled,
> and any resets that affect the PHY are de-asserted before using the PHY.
> 
> RESET_PCIE0_GLOBAL reset is necessary during, and only, the calibration stage
> of combo phy.


But this is not PCI! Why would you call it "I need to reset PCI" while
you describe the USB device?


Best regards,
Krzysztof