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Message-ID: <20250729153823.2026154-1-wangyushan12@huawei.com>
Date: Tue, 29 Jul 2025 23:38:15 +0800
From: Yushan Wang <wangyushan12@...wei.com>
To: <will@...nel.org>, <mark.rutland@....com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
CC: <jonathan.cameron@...wei.com>, <prime.zeng@...ilicon.com>,
<fanghao11@...wei.com>, <linuxarm@...wei.com>, <yangyicong@...ilicon.com>,
<wangyushan12@...wei.com>
Subject: [PATCH 0/8] Updates of HiSilicon Uncore L3C PMU
Support new version of L3C PMU, which supports extended events space
which can be controlled in up to 2 extra address spaces with separate
overflow interrupts. The layout of the control/event registers are kept
the same. The extended events with original ones together cover the
monitoring job of all transactions on L3C.
That's said, the driver supports finer granual statistics of L3 cache
with separated and dedicated PMUs, and a new operand `ext` to give a
hint of to which part should perf counting command be delivered.
The extended events is specified with `ext=[1|2]` option for the driver
to distinguish:
perf stat -e hisi_sccl0_l3c0_0/event=<event_id>,ext=<ext>/
Currently only event option using config bit [7, 0]. There's still
plenty unused space. Make ext using config [16, 17] and reserve
bit [15, 8] for event option for future extension.
With the capability of extra counters, number of counters for HiSilicon
uncore PMU could reach up to 24, the usedmap is extended accordingly.
The hw_perf_event::event_base is initialized to the base MMIO address
of the event and will be used for later control, overflow handling and
counts readout.
We still make use of the Uncore PMU framework for handling the events
and interrupt migration on CPU hotplug. The framework's cpuhp callback
will handle the event migration and interrupt migration of orginial
event, if PMU supports extended events then the interrupt of extended
events is migrated to the same CPU choosed by the framework.
A new HID of HISI0215 is used for this version of L3C PMU.
Some necessary refactor is included, allowing the framework to cope with
the new version of driver.
Depends-on: drivers/perf: hisi: Add support for HiSilicon NOC and MN PMU driver
Depends-on: Message-ID: <20250717121727.61057-1-yangyicong@...wei.com>
Yicong Yang (7):
drivers/perf: hisi: Relax the event ID check in the framework
drivers/perf: hisi: Export hisi_uncore_pmu_isr()
drivers/perf: hisi: Simplify the probe process of each L3C PMU version
drivers/perf: hisi: Extract the event filter check of L3C PMU
drivers/perf: hisi: Extend the field of tt_core
drivers/perf: hisi: Refactor the event configuration of L3C PMU
drivers/perf: hisi: Add support for L3C PMU v3
Yushan Wang (1):
Documentation: hisi-pmu: Add introduction to HiSilicon V3 PMU
Documentation/admin-guide/perf/hisi-pmu.rst | 43 +-
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 527 +++++++++++++++----
drivers/perf/hisilicon/hisi_uncore_pmu.c | 5 +-
drivers/perf/hisilicon/hisi_uncore_pmu.h | 6 +-
4 files changed, 484 insertions(+), 97 deletions(-)
--
2.33.0
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