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Message-ID: <20250730195022.449894-3-daniel.lezcano@linaro.org>
Date: Wed, 30 Jul 2025 21:50:15 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: mbrugger@...e.com,
	chester62515@...il.com,
	ghennadi.procopciuc@....nxp.com,
	shawnguo@...nel.org,
	s.hauer@...gutronix.de
Cc: s32@....com,
	kernel@...gutronix.de,
	festevam@...il.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	linux-arm-kernel@...ts.infradead.org,
	imx@...ts.linux.dev,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Ghennadi Procopciuc <ghennadi.procopciuc@....com>,
	Thomas Fossati <thomas.fossati@...aro.org>
Subject: [PATCH 2/8] arm64: dts: s32g274-rd2: Enable the STM timers

Enable the timers STM0 -> STM3 on the s32g274-rd2

The platform has 4 CPUs and the Linux STM timer driver is per
CPU. Enable 4 timers which will be used, other timers are useless for
the Linux kernel and there is no benefit to enable them.

Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
Cc: Thomas Fossati <thomas.fossati@...aro.org>
---
 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index b5ba51696f43..505776d19151 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -40,6 +40,22 @@ &uart1 {
 	status = "okay";
 };
 
+&stm0 {
+	status = "okay";
+};
+
+&stm1 {
+	status = "okay";
+};
+
+&stm2 {
+	status = "okay";
+};
+
+&stm3 {
+	status = "okay";
+};
+
 &usdhc0 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc0>;
-- 
2.43.0


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