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Message-Id: <20250730070026.60109-1-amadeus@jmu.edu.cn>
Date: Wed, 30 Jul 2025 15:00:26 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: w@....eu
Cc: alchark@...il.com,
	amadeus@....edu.cn,
	conor+dt@...nel.org,
	devicetree@...r.kernel.org,
	heiko@...ech.de,
	jonas@...boo.se,
	krzk+dt@...nel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-rockchip@...ts.infradead.org,
	ziyao@...root.org
Subject: Re: [PATCH v2 1/1] arm64: dts: rockchip: rk3528: Add CPU frequency scaling support

Hi,

> It's interesting to note that 816, 1008 and 1200 MHz result in a higher
> frequency than configured, but upper ones result in slightly smaller
> frequencies (~2%, might just be a measurement error), particularly for
> the last one which is 6% lower.

Please refer to the description of this series:
https://lore.kernel.org/lkml/20250320100002.332720-1-amadeus@jmu.edu.cn/

During the discussion, it was considered that the minimum voltage should
be 875mV to maintain stability, so there is a deviation in the frequency
between 816MHz and 1200MHz.

> I noticed a missing entry for 2 GHz in clk-rk3528.c so I've added it,
> expecting that it would solve the problem:
>
> +       RK3036_PLL_RATE(2016000000, 1, 84, 1, 1, 1, 0),
>
> But it had no effect at all, the frequency remains limited to 1896 MHz.

There is a comment in the bsp kernel:
https://github.com/rockchip-linux/kernel/blob/develop-5.10/drivers/clk/rockchip/clk-rk3528.c#L101

Only 408MHz and 600MHz are generated by normal PLL, the rest of the
CPU frequency is controlled by TF-A via SCMI.

> Or maybe we could simply raise the voltage a little bit. The table above
> shows that at 1.15V we're close to the configured OPP and still below the
> stock voltage. This is not critical, but I find it a bit annoying that
> enabling cpufreq results in lower performance than without!

I also mentioned this in the cover letter. The actual frequency of 2016MHz
requires 1.13V ~ 1.15V. Not sure if this is safe for the rk3528 SoC.

Thanks,
Chukun

--
2.25.1



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