linux-kernel - [PATCH v2 4/5] arm64: dts: exynos2200: add serial

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Message-ID: <20250730074253.1884111-5-ivo.ivanov.ivanov1@gmail.com>
Date: Wed, 30 Jul 2025 10:42:52 +0300
From: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
To: Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Alim Akhtar <alim.akhtar@...sung.com>,
	Rob Herring <robh@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>
Cc: linux-samsung-soc@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v2 4/5] arm64: dts: exynos2200: add serial_0/1 nodes

Add nodes for serial_0 (UART_DBG) and serial_1 (UART_BT), which
allows using them.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@...il.com>
---
 arch/arm64/boot/dts/exynos/exynos2200.dtsi | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
index bab77b442..22c6da907 100644
--- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
@@ -336,6 +336,19 @@ pinctrl_peric1: pinctrl@...30000 {
 			reg = <0x10730000 0x1000>;
 		};
 
+		serial_1: serial@...40000 {
+			compatible = "samsung,exynos2200-uart", "google,gs101-uart";
+			reg = <0x10840000 0x100>;
+			clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>,
+				 <&cmu_peric1 CLK_DOUT_PERIC1_UART_BT>;
+			clock-names = "uart", "clk_uart_baud0";
+			interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH 0>;
+			pinctrl-0 = <&uart1_bus>;
+			pinctrl-names = "default";
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
 		cmu_hsi0: clock-controller@...00000 {
 			compatible = "samsung,exynos2200-cmu-hsi0";
 			reg = <0x10a00000 0x8000>;
@@ -458,6 +471,19 @@ pinctrl_peric2: pinctrl@...30000 {
 			reg = <0x11c30000 0x1000>;
 		};
 
+		serial_0: serial@...40000 {
+			compatible = "samsung,exynos2200-uart", "google,gs101-uart";
+			reg = <0x11c40000 0x100>;
+			clocks = <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>,
+				 <&cmu_peric2 CLK_DOUT_PERIC2_UART_DBG>;
+			clock-names = "uart", "clk_uart_baud0";
+			interrupts = <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH 0>;
+			pinctrl-0 = <&uart0_bus_single>;
+			pinctrl-names = "default";
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
 		cmu_cmgp: clock-controller@...00000 {
 			compatible = "samsung,exynos2200-cmu-cmgp";
 			reg = <0x14e00000 0x8000>;
-- 
2.43.0