linux-kernel - [PATCH V1 2/3] arm64: dts: qcom: sm8650: Enable MCQ support for UFS controller

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Message-ID: <20250730082229.23475-3-quic_rdwivedi@quicinc.com>
Date: Wed, 30 Jul 2025 13:52:28 +0530
From: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
To: <mani@...nel.org>, <alim.akhtar@...sung.com>, <avri.altman@....com>,
        <bvanassche@....org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <agross@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH V1 2/3] arm64: dts: qcom: sm8650: Enable MCQ support for UFS controller

Enable Multi-Circular Queue (MCQ) support for the UFS host controller
on the Qualcomm SM8650 platform by updating the device tree node. This
includes adding new register regions and specifying the MSI parent
required for MCQ operation.

MCQ is a modern queuing model for UFS that improves performance and
scalability by allowing multiple hardware queues. 

Changes:
- Add reg entries for mcq_sqd and mcq_vs regions.
- Define reg-names for the new regions.
- Specify msi-parent for interrupt routing.

Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index e14d3d778b71..5d164fe511ba 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3982,7 +3982,12 @@ ufs_mem_phy: phy@...0000 {
 
 		ufs_mem_hc: ufshc@...4000 {
 			compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
-			reg = <0 0x01d84000 0 0x3000>;
+			reg = <0 0x01d84000 0 0x3000>,
+			      <0 0x01da5000 0 0x2000>,
+			      <0 0x01da4000 0 0x0010>;
+			reg-names = "ufs_mem",
+				    "mcq_sqd",
+				    "mcq_vs";
 
 			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
 
@@ -4020,6 +4025,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 
 			iommus = <&apps_smmu 0x60 0>;
 
+			msi-parent = <&gic_its 0x60>;
+
 			lanes-per-direction = <2>;
 			qcom,ice = <&ice>;
 
-- 
2.50.1