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Message-ID: <20250730082852.oxy3tjjtdrykrzne@vireshk-i7>
Date: Wed, 30 Jul 2025 13:58:52 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>
Cc: andersson@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
konradybcio@...nel.org, rafael@...nel.org, ilia.lin@...nel.org,
djakov@...nel.org, quic_srichara@...cinc.com,
quic_mdalam@...cinc.com, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v4 3/4] cpufreq: qcom-nvmem: Enable cpufreq for ipq5424
On 30-07-25, 13:43, Varadarajan Narayanan wrote:
> From: Md Sadre Alam <quic_mdalam@...cinc.com>
>
> IPQ5424 have different OPPs available for the CPU based on
> SoC variant. This can be determined through use of an eFuse
> register present in the silicon.
>
> Added support for ipq5424 on nvmem driver which helps to
> determine OPPs at runtime based on the eFuse register which
> has the CPU frequency limits. opp-supported-hw dt binding
> can be used to indicate the available OPPs for each limit.
>
> nvmem driver also creates the "cpufreq-dt" platform_device after
> passing the version matching data to the OPP framework so that the
> cpufreq-dt handles the actual cpufreq implementation.
>
> Signed-off-by: Md Sadre Alam <quic_mdalam@...cinc.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> [ Changed '!=' based check to '==' based check ]
> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
> ---
> v2: Add Reviewed-by: Konrad
> Change speed bin check to == instead of !=
> --
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> drivers/cpufreq/qcom-cpufreq-nvmem.c | 5 +++++
> 2 files changed, 6 insertions(+)
Acked-by: Viresh Kumar <viresh.kumar@...aro.org>
Lemme know if you want me to pick this one.
--
viresh
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