linux-kernel - Re: [PATCH v5 00/18] clk: qcom: Add support to attach multiple power domains in cc probe

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Message-ID: <0a6baf09-b1b8-4573-b53d-574838efd9ec@quicinc.com>
Date: Wed, 30 Jul 2025 15:20:06 +0530
From: Jagadeesh Kona <quic_jkona@...cinc.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        "Stephen
 Boyd" <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>,
        Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
        Dmitry Baryshkov <lumag@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
        Imran Shaik
	<quic_imrashai@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        "Satya Priya
 Kakitapalli" <quic_skakitap@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski@...aro.org>,
        Bryan O'Donoghue
	<bryan.odonoghue@...aro.org>,
        Dmitry Baryshkov
	<dmitry.baryshkov@....qualcomm.com>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v5 00/18] clk: qcom: Add support to attach multiple power
 domains in cc probe



On 7/29/2025 8:19 PM, neil.armstrong@...aro.org wrote:
> Hi,
> 
> On 30/05/2025 15:20, Jagadeesh Kona wrote:
>> In recent QCOM chipsets, PLLs require more than one power domain to be
>> kept ON to configure the PLL. But the current code doesn't enable all
>> the required power domains while configuring the PLLs, this leads to
>> functional issues due to suboptimal settings of PLLs.
>>
>> To address this, add support for handling runtime power management,
>> configuring plls and enabling critical clocks from qcom_cc_really_probe.
>> The clock controller can specify PLLs, critical clocks, and runtime PM
>> requirements using the descriptor data. The code in qcom_cc_really_probe()
>> ensures all necessary power domains are enabled before configuring PLLs
>> or critical clocks.
>>
>> This series fixes the below warning reported in SM8550 venus testing due
>> to video_cc_pll0 not properly getting configured during videocc probe
>>
>> [   46.535132] Lucid PLL latch failed. Output may be unstable!
>>
>> The patch adding support to configure the PLLs from common code is
>> picked from below series and updated it.
>> https://lore.kernel.org/all/20250113-support-pll-reconfigure-v1-0-1fae6bc1062d@quicinc.com/
>>
>> This series is dependent on bindings patch in below Vladimir's series, hence
>> included the Vladimir's series patches also in this series and updated them.
>> https://lore.kernel.org/all/20250303225521.1780611-1-vladimir.zapolskiy@linaro.org/
> 
> 
> Could you re-spin patches 13 to 18 to fix the bindings checks ?
> 

I tried applying the patches 13-18 on latest linux-next tip and I see they are applied properly without any conflicts.

Bjorn, can you please help to pick the patches 13-18 to fix the bindings checks[1]. Please let me know if anything needed from me.

[1]: https://lore.kernel.org/oe-kbuild-all/453bd020-8124-4a7d-8d0f-8180d38f1ebc@quicinc.com/#t

Thanks,
Jagadeesh


> Thanks,
> Neil
> 
> <snip>
>