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Message-ID: <aInrgnGsBSVpxrWE@hovoldconsulting.com>
Date: Wed, 30 Jul 2025 11:53:06 +0200
From: Johan Hovold <johan@...nel.org>
To: Ziyue Zhang <ziyue.zhang@....qualcomm.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, jingoohan1@...il.com,
mani@...nel.org, lpieralisi@...nel.org, kwilczynski@...nel.org,
bhelgaas@...gle.com, johan+linaro@...nel.org, vkoul@...nel.org,
kishon@...nel.org, neil.armstrong@...aro.org, abel.vesa@...aro.org,
kw@...ux.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
qiang.yu@....qualcomm.com, quic_krichai@...cinc.com,
quic_vbadigan@...cinc.com
Subject: Re: [PATCH v7 2/3] arm64: dts: qcom: sa8775p: remove aux clock from
pcie phy
On Fri, Jul 25, 2025 at 06:22:30PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is used by the PCIe Root Complex (RC) and is not required
> by the PHY. The correct clock for the PHY is gcc_phy_aux_clk, which this
> patch uses to replace the incorrect reference.
>
> The distinction between AUX_CLK and PHY_AUX_CLK is important: AUX_CLK is
> typically used by the controller, while PHY_AUX_CLK is required by certain
> PHYs—particularly Gen4 QMP PHYs—for internal operations such as clock
> gating and power management. Some non-Gen4 Qualcomm PHYs also use
> PHY_AUX_CLK, but they do not require AUX_CLK.
>
> This change ensures proper clock configuration and avoids unnecessary
> dependencies.
>
> Signed-off-by: Ziyue Zhang <ziyue.zhang@....qualcomm.com>
With the fixes tag added (Konrad's comment should be picked up by the
maintainer/tooling, no need to resend for that):
Reviewed-by: Johan Hovold <johan+linaro@...nel.org>
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