linux-kernel - Re: [PATCH v3] x86/cpu/intel: Fix the constant

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Message-ID: <30f01900-e79f-4947-b0b4-c4ba29d18084@intel.com>
Date: Wed, 30 Jul 2025 07:42:36 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: Suchit Karunakaran <suchitkarunakaran@...il.com>, <tglx@...utronix.de>,
	<mingo@...hat.com>, <bp@...en8.de>, <dave.hansen@...ux.intel.com>,
	<hpa@...or.com>, <darwi@...utronix.de>, <peterz@...radead.org>,
	<ravi.bangoria@....com>
CC: <skhan@...uxfoundation.org>, <linux-kernel-mentees@...ts.linux.dev>,
	<linux-kernel@...r.kernel.org>, <stable@...r.kernel.org>
Subject: Re: [PATCH v3] x86/cpu/intel: Fix the constant_tsc model check for
 Pentium 4s

Hi Suchit,

The patch looks good to me except for a few nits below.

On 7/29/2025 9:26 PM, Suchit Karunakaran wrote:
> The logic to synthesize constant_tsc for Pentium 4s (Family 15) is
> wrong. Since INTEL_P4_PRESCOTT is numerically greater than
> INTEL_P4_WILLAMETTE, the logic always results in false and never sets
> X86_FEATURE_CONSTANT_TSC for any Pentium 4 model.

A blank line here would be useful to separate the two paragraphs.

> The error was introduced while replacing the x86_model check with a VFM
> one. The original check was as follows:

Maybe to make it more precise and avoid confusion.

The original check before the erroneous code was as follows:

>         if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
>                 (c->x86 == 0x6 && c->x86_model >= 0x0e))
>                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
> 
> Fix the logic to cover all Pentium 4 models from Prescott (model 3) to
> Cedarmill (model 6) which is the last model released in Family 15.
> 
> Fixes: fadb6f569b10 ("x86/cpu/intel: Limit the non-architectural constant_tsc model checks")
> 
> Cc: <stable@...r.kernel.org> # v6.15
> 
> Signed-off-by: Suchit Karunakaran <suchitkarunakaran@...il.com>
> 

Reviewed-by: Sohil Mehta <sohil.mehta@...el.com>
(without the blank lines as Greg mentioned)

> 
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index 076eaa41b8c8..6f5bd5dbc249 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -262,7 +262,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
>  	if (c->x86_power & (1 << 8)) {
>  		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
>  		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
> -	} else if ((c->x86_vfm >= INTEL_P4_PRESCOTT && c->x86_vfm <= INTEL_P4_WILLAMETTE) ||
> +	} else if ((c->x86_vfm >=  INTEL_P4_PRESCOTT && c->x86_vfm <= INTEL_P4_CEDARMILL) ||

The alignment here seems to have changed because the extra space after
INTEL_P4_PRESCOTT was moved before it. The current code has alignment
matched with the below line. It isn't a big deal, but keeps the code
easier to read.


>  		   (c->x86_vfm >= INTEL_CORE_YONAH  && c->x86_vfm <= INTEL_IVYBRIDGE)) {
>  		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
>  	}