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Message-ID: <e50e5e01-0b73-403c-8119-8f202c488bb9@oss.nxp.com>
Date: Fri, 1 Aug 2025 10:34:41 +0300
From: Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>
To: Daniel Lezcano <daniel.lezcano@...aro.org>, tglx@...utronix.de
Cc: S32@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 11/20] clocksource/drivers/vf-pit: Encapsulate the
 PTLCVAL macro

On 7/30/2025 11:27 AM, Daniel Lezcano wrote:
[...]
 >  static inline struct pit_timer *ced_to_pit(struct clock_event_device
*ced)
>  {
> @@ -69,14 +69,14 @@ static inline void pit_irq_acknowledge(struct pit_timer *pit)
>  
>  static u64 notrace pit_read_sched_clock(void)
>  {
> -	return ~readl(clksrc_base + PITCVAL);
> +	return ~readl(sched_clock_base);

This appears asymmetric compared to 'pit_timer_clocksource_read', where
an explicit cast is present but seems to be missing here.

>  }
>  
>  static u64 pit_timer_clocksource_read(struct clocksource *cs)
>  {
>  	struct pit_timer *pit = cs_to_pit(cs);
>  
> -	return (u64)~readl(pit->clksrc_base + PITCVAL);
> +	return (u64)~readl(PITCVAL(pit->clksrc_base));
>  }
>  
>  static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem *base,
> @@ -99,8 +99,7 @@ static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem *base
>  	writel(~0, PITLDVAL(pit->clksrc_base));
>  	writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base));
>  
> -	clksrc_base = pit->clksrc_base;
> -
> +	sched_clock_base = pit->clksrc_base + PITCVAL_OFFSET;
>  	sched_clock_register(pit_read_sched_clock, 32, rate);
>  
>  	return clocksource_register_hz(&pit->cs, rate);

-- 
Regards,
Ghennadi

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