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Message-ID: <7bac637b-9483-4341-91c0-e31d5c2f0ea3@oss.qualcomm.com>
Date: Fri, 1 Aug 2025 13:58:00 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: Viresh Kumar <viresh.kumar@...aro.org>
Cc: Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
Stephen Boyd <sboyd@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 0/3] opp: Add bw_factor support to adjust bandwidth
dynamically
On 8/1/2025 12:58 PM, Viresh Kumar wrote:
> On 01-08-25, 12:05, Krishna Chaitanya Chundru wrote:
>> Can you please review this once.
>
> Sorry about the delay.
>
>>> The existing OPP table in the device tree for PCIe is shared across
>>> different link configurations such as data rates 8GT/s x2 and 16GT/s x1.
>>> These configurations often operate at the same frequency, allowing them
>>> to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have
>>> different characteristics beyond frequency—such as RPMh votes in QCOM
>>> case, which cannot be represented accurately when sharing a single OPP.
>
> From the looks of it, something like this should also work:
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 54c6d0fdb2af..0a76bc4c4dc9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2216,18 +2216,12 @@ opp-2500000 {
> opp-peak-kBps = <250000 1>;
> };
>
> - /* GEN 1 x2 and GEN 2 x1 */
> + /* GEN 2 x1 */
> opp-5000000 {
> opp-hz = /bits/ 64 <5000000>;
> required-opps = <&rpmhpd_opp_low_svs>;
> - opp-peak-kBps = <500000 1>;
> - };
> -
> - /* GEN 2 x2 */
> - opp-10000000 {
> - opp-hz = /bits/ 64 <10000000>;
> - required-opps = <&rpmhpd_opp_low_svs>;
> - opp-peak-kBps = <1000000 1>;
> + opp-peak-kBps-x1 = <500000 1>;
> + opp-peak-kBps-x2 = <1000000 1>;
> };
>
> /* GEN 3 x1 */
> @@ -2237,18 +2231,12 @@ opp-8000000 {
> opp-peak-kBps = <984500 1>;
> };
>
> - /* GEN 3 x2 and GEN 4 x1 */
> + /* GEN 4 x1 */
> opp-16000000 {
> opp-hz = /bits/ 64 <16000000>;
> required-opps = <&rpmhpd_opp_nom>;
> - opp-peak-kBps = <1969000 1>;
> - };
> -
> - /* GEN 4 x2 */
> - opp-32000000 {
> - opp-hz = /bits/ 64 <32000000>;
> - required-opps = <&rpmhpd_opp_nom>;
> - opp-peak-kBps = <3938000 1>;
> + opp-peak-kBps-x1 = <1969000 1>;
> + opp-peak-kBps-x2 = <3938000 1>;
> };
> };
>
> The OPP core supports named properties, which will make this work.
Hi Viresh,
When ever PCIe link speed/width changes we need to update the OPP votes,
If we use named properties approach we might not be able to change it
dynamically without removing the OPP table first. For that reason only
we haven't used that approach.
Correct us if our understanding is wrong.
- Krishna Chaitanya.
>
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