Message-ID:
 <SA3PR04MB8931098CC4A73E8FDD481DA78326A@SA3PR04MB8931.namprd04.prod.outlook.com>
Date: Fri, 1 Aug 2025 10:34:52 +0000
From: Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>
To: Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>, Conor Dooley
	<conor@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
	<krzk+dt@...nel.org>, Thomas Gleixner <tglx@...utronix.de>
CC: Paul Walmsley <paul.walmsley@...ive.com>, Samuel Holland
	<samuel.holland@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou
	<aou@...s.berkeley.edu>, Daniel Lezcano <daniel.lezcano@...aro.org>, Min Lin
	<linmin@...incomputing.com>, Pritesh Patel <pritesh.patel@...fochips.com>,
	Yangyu Chen <cyy@...self.name>, Lad Prabhakar
	<prabhakar.mahadev-lad.rj@...renesas.com>, Yu Chien Peter Lin
	<peterlin@...estech.com>, Charlie Jenkins <charlie@...osinc.com>, Kanak
 Shilledar <kanakshilledar@...il.com>, Darshan Prajapati
	<darshan.prajapati@...fochips.com>, Neil Armstrong
	<neil.armstrong@...aro.org>, Heiko Stuebner <heiko@...ech.de>, Aradhya Bhatia
	<a-bhatia1@...com>, "rafal@...ecki.pl" <rafal@...ecki.pl>, Anup Patel
	<anup@...infault.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-riscv@...ts.infradead.org"
	<linux-riscv@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: [PATCH v4 0/7] Basic device tree support for ESWIN EIC7700 RISC-V SoC

Hello All,

Gentle reminder to review DT patches.

Regards,
Pinkesh

On Mon, Jun 16, 2025 at 04:53 PM, Pinkesh Vaghela wrote:
> Add support for ESWIN EIC7700 SoC consisting of SiFive Quad-Core
> P550 CPU cluster and the first development board that uses it, the SiFive
> HiFive Premier P550.
>
> This patch series adds initial device tree and also adds ESWIN architecture
> support.
>
> Boot-tested using intiramfs with Linux v6.16-rc1 on HiFive Premier
> P550 board using U-Boot 2024.01 and OpenSBI 1.4.
>
> Changes in v4:
> - Rebased the patches to kernel v6.16-rc1
> - Drop patches that are already merged
> - Added "Acked-by" tag of "Min Lin" for Patch 4
> - Corrected the commit message of Patch 7 (Patch #10 in v3)
> - Added "Tested-by" tag of "Ariel D'Alessandro" for Patch 7
> - Link to v3:
> https://lore.k/
> ernel.org%2Flkml%2F20250410152519.1358964-1-
> pinkesh.vaghela%40einfochips.com%2F&data=05%7C02%7Cpinkesh.vaghela%
> 40einfochips.com%7C806aaa42dce241c4336508ddacc83209%7C0beb0c359cb
> b4feb99e5589e415c7944%7C1%7C0%7C638856698032875512%7CUnknown
> %7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAi
> OiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=
> rybUbD70SwOCscQQPb8BHNCuCRArtIC6WuAhBl%2B9NXQ%3D&reserved=0
>
> Changes in v3:
> - Rebased the patches to kernel 6.15.0-rc1
> - Added "Reviewed-by" tag of "Rob Herring" for Patch 4
> - Updated MAINTAINERS file
>   - Add GIT tree URL
> - Updated DTSI file
>   - Added "dma-noncoherent" property to soc node
>   - Updated GPIO node labels in DTSI file
> - Link to v2:
> https://lore.k/
> ernel.org%2Flkml%2F20250320105449.2094192-1-
> pinkesh.vaghela%40einfochips.com%2F&data=05%7C02%7Cpinkesh.vaghela%
> 40einfochips.com%7C806aaa42dce241c4336508ddacc83209%7C0beb0c359cb
> b4feb99e5589e415c7944%7C1%7C0%7C638856698032894093%7CUnknown
> %7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAi
> OiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=
> RPTdRCpWIvS93NgzWSnuelxcMdiS4xyQI4tKpUoVOtc%3D&reserved=0
>
> Changes in v2:
> - Added "Acked-by" tag of "Conor Dooley" for Patches 1, 2, 3, 7 and 8
> - Added "Reviewed-by" tag of "Matthias Brugger" for Patch 4
> - Updated MAINTAINERS file
>   - Add the path for the eswin binding file
> - Updated sifive,ccache0.yaml
>   - Add restrictions for "cache-size" property based on the
>     compatible string
> - Link to v1:
> https://lore.k/
> ernel.org%2Flkml%2F20250311073432.4068512-1-
> pinkesh.vaghela%40einfochips.com%2F&data=05%7C02%7Cpinkesh.vaghela%
> 40einfochips.com%7C806aaa42dce241c4336508ddacc83209%7C0beb0c359cb
> b4feb99e5589e415c7944%7C1%7C0%7C638856698032903170%7CUnknown
> %7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAi
> OiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=
> gt6NHMFR1H%2Fd4o7sasfWyeE5kmMmnGuioeU1C%2FEf9AM%3D&reserved
> =0
>
> Darshan Prajapati (2):
>   dt-bindings: riscv: Add SiFive P550 CPU compatible
>   dt-bindings: interrupt-controller: Add ESWIN EIC7700 PLIC
>
> Min Lin (2):
>   riscv: dts: add initial support for EIC7700 SoC
>   riscv: dts: eswin: add HiFive Premier P550 board device tree
>
> Pinkesh Vaghela (1):
>   riscv: Add Kconfig option for ESWIN platforms
>
> Pritesh Patel (2):
>   dt-bindings: vendor-prefixes: add eswin
>   dt-bindings: riscv: Add SiFive HiFive Premier P550 board
>
>  .../sifive,plic-1.0.0.yaml                    |   1 +
>  .../devicetree/bindings/riscv/cpus.yaml       |   1 +
>  .../devicetree/bindings/riscv/eswin.yaml      |  29 ++
>  .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>  MAINTAINERS                                   |   9 +
>  arch/riscv/Kconfig.socs                       |   6 +
>  arch/riscv/boot/dts/Makefile                  |   1 +
>  arch/riscv/boot/dts/eswin/Makefile            |   2 +
>  .../dts/eswin/eic7700-hifive-premier-p550.dts |  29 ++
>  arch/riscv/boot/dts/eswin/eic7700.dtsi        | 345 ++++++++++++++++++
>  10 files changed, 425 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/riscv/eswin.yaml
>  create mode 100644 arch/riscv/boot/dts/eswin/Makefile
>  create mode 100644 arch/riscv/boot/dts/eswin/eic7700-hifive-premier-
> p550.dts
>  create mode 100644 arch/riscv/boot/dts/eswin/eic7700.dtsi
>
> --
> 2.25.1

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