linux-kernel - Re: [PATCH v2 8/9] watchdog: rzv2h: Add support for RZ/T2H

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Message-ID: <CA+V-a8se2NMGPEffwnAgDp4NB0vHndf2EQmvNTT5ySzr8c4OMg@mail.gmail.com>
Date: Fri, 1 Aug 2025 12:15:22 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Wolfram Sang <wsa+renesas@...g-engineering.com>
Cc: Wim Van Sebroeck <wim@...ux-watchdog.org>, Guenter Roeck <linux@...ck-us.net>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>, 
	Magnus Damm <magnus.damm@...il.com>, linux-watchdog@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-renesas-soc@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 8/9] watchdog: rzv2h: Add support for RZ/T2H

Hi Wolfram,

Thank you for the review.

On Fri, Aug 1, 2025 at 5:12 AM Wolfram Sang
<wsa+renesas@...g-engineering.com> wrote:
>
> On Tue, Jul 29, 2025 at 04:59:14PM +0100, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Add support for the RZ/T2H watchdog timer. The RZ/T2H requires control of
> > the watchdog counter using the WDT Debug Control Register (WDTDCR), which
> > allows explicitly stopping and starting the counter. This behavior differs
> > from RZ/V2H, which doesn't use WDTDCR, so the driver is extended to handle
> > this requirement.
>
> Is it really required or is it an additional feature?
>
Sorry for not being clear WDTDCR register is not present on the
RZ/V2H(P) SoC, and is required on RZ/T2H (and RZ/N2H) SoC to
start/stop down counting.

> > To support this, a new `wdtdcr` flag is introduced in the `rzv2h_of_data`
> > structure. When set, the driver maps the WDTDCR register and uses it to
> > control the watchdog counter in the start, stop, and restart callbacks.
> > Additionally, the clock divisor and count source for RZ/T2H are defined
> > to match its hardware configuration.
>
> Where is the register placed? We need a seperate resource for it? Can
> you kindly give an example DT node for this case?
>
The WDTDCR register is placed somewhere out and yes we need a separate
resource for it.

Below is the node for RZ/T2H SoC:
        wdt0: watchdog@...82000 {
            compatible = "renesas,r9a09g077-wdt";
            reg = <0 0x80082000 0 0x400>,
                  <0 0x81295100 0 0x04>;
            clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKL>;
            clock-names = "pclk";
            power-domains = <&cpg>;
            status = "disabled";
        };

Cheers,
Prabhakar