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Message-ID: <aIyr33e7BUAep2MI@shell.armlinux.org.uk>
Date: Fri, 1 Aug 2025 12:58:23 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Alexander Wilhelm <alexander.wilhelm@...termo.com>
Cc: Vladimir Oltean <olteanv@...il.com>, Andrew Lunn <andrew@...n.ch>,
	Heiner Kallweit <hkallweit1@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: Aquantia PHY in OCSGMII mode?

On Fri, Aug 01, 2025 at 01:54:29PM +0200, Alexander Wilhelm wrote:
> Am Fri, Aug 01, 2025 at 02:01:06PM +0300 schrieb Vladimir Oltean:
> > On Thu, Jul 31, 2025 at 08:26:43PM +0100, Russell King (Oracle) wrote:
> > > and this works. So... we could actually reconfigure the PHY independent
> > > of what was programmed into the firmware.
> > 
> > It does work indeed, the trouble will be adding this code to the common
> > mainline kernel driver and then watching various boards break after their
> > known-good firmware provisioning was overwritten, from a source of unknown
> > applicability to their system.
> 
> You're right. I've now selected a firmware that uses a different provisioning
> table, which already configures the PHY for 2500BASE-X with Flow Control.
> According to the documentation, it should support all modes: 10M, 100M, 1G, and
> 2.5G.
> 
> It seems the issue lies with the MAC, as it doesn't appear to handle the
> configured PHY_INTERFACE_MODE_2500BASEX correctly. I'm currently investigating
> this further.

Which MAC driver, and is it using phylink?

phylib doesn't know about rate matching, so either you need to replicate
much of what phylink does, or make sure the MAC driver uses phylink.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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