[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c59aa7ac-62a6-45ec-b626-de518b25f7d9@intel.com>
Date: Fri, 1 Aug 2025 07:22:44 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Sohil Mehta <sohil.mehta@...el.com>, Thomas Gleixner
<tglx@...utronix.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
Kees Cook <kees@...nel.org>
Cc: Jonathan Corbet <corbet@....net>, Ingo Molnar <mingo@...nel.org>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
Kai Huang <kai.huang@...el.com>, Sandipan Das <sandipan.das@....com>,
Breno Leitao <leitao@...ian.org>, Rick Edgecombe
<rick.p.edgecombe@...el.com>, Alexei Starovoitov <ast@...nel.org>,
Hou Tao <houtao1@...wei.com>, Juergen Gross <jgross@...e.com>,
Vegard Nossum <vegard.nossum@...cle.com>, Eric Biggers
<ebiggers@...gle.com>, Jason Gunthorpe <jgg@...pe.ca>,
"Masami Hiramatsu (Google)" <mhiramat@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Luis Chamberlain <mcgrof@...nel.org>, Yuntao Wang <ytcoode@...il.com>,
Rasmus Villemoes <linux@...musvillemoes.dk>,
Christophe Leroy <christophe.leroy@...roup.eu>, Tejun Heo <tj@...nel.org>,
Changbin Du <changbin.du@...wei.com>,
Huang Shijie <shijie@...amperecomputing.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Namhyung Kim <namhyung@...nel.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-efi@...r.kernel.org, linux-mm@...ck.org,
"Kirill A. Shutemov" <kas@...nel.org>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>,
Peter Zijlstra <peterz@...radead.org>, Ard Biesheuvel <ardb@...nel.org>,
"Paul E. McKenney" <paulmck@...nel.org>, Josh Poimboeuf
<jpoimboe@...nel.org>, Xiongwei Song <xiongwei.song@...driver.com>,
Xin Li <xin3.li@...el.com>, "Mike Rapoport (IBM)" <rppt@...nel.org>,
Brijesh Singh <brijesh.singh@....com>, Michael Roth <michael.roth@....com>,
Tony Luck <tony.luck@...el.com>, Alexey Kardashevskiy <aik@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
X86-kernel <x86@...nel.org>
Subject: Re: [PATCHv9 04/16] x86/cpu: Defer CR pinning setup until core
initcall
On 7/31/25 21:43, Sohil Mehta wrote:
...
> Could deferring enforcement lead to a scenario where we end up with
> different CR4 values on different CPUs? Maybe I am misinterpreting this
> and protecting against in-kernel errors is not a goal.
Sure, theoretically.
But if that's a concern, it can be checked at the time that enforcement
starts:
for_each_online_cpu(cpu) {
unsigned long cr4 = per_cpu(cpu_tlbstate.cr4, cpu);
if ((cr4 & cr4_pinned_mask) == cr4_pinned_bits))
continue;
WARN("blah blah");
}
Or use smp_call_function() to check each CPU's CR4 directly.
Or, the next time that CPU does a TLB flush that toggles X86_CR4_PGE,
it'll get the warning from the regular pinning path.
So, sure, this does widen the window during boot where a secondary CPU
might get a bad CR4 value, and it would make it harder to track down
where it happened. We _could_ print a pr_debug() message when the bit
gets cleared but not enforce things if anyone is super worried about this.
> In general, you want to delay the CR pinning enforcement until
> absolutely needed. I am curious about the motivation. I understand we
> should avoid doing it at arbitrary points in the boot. But,
> arch_cpu_finalize_init() and early_initcall() seem to be decent
> mileposts to me.
>
> Are you anticipating that we would need to move setup_cr_pinning() again
> when another user similar to EFI shows up?
Yep.
Powered by blists - more mailing lists