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Message-Id: <f9c0fd21-591e-4fd0-a13e-35cdc1aa063d@app.fastmail.com>
Date: Fri, 01 Aug 2025 07:52:14 -0700
From: "Kyle Manna" <kyle@...emanna.com>
To: "Qiuxu Zhuo" <qiuxu.zhuo@...el.com>, "Tony Luck" <tony.luck@...el.com>,
 "Borislav Petkov" <bp@...en8.de>, "Jason Baron" <jbaron@...mai.com>
Cc: "James Jernigan" <jameswestonjernigan@...il.com>,
 "James Morse" <james.morse@....com>,
 "Mauro Carvalho Chehab" <mchehab@...nel.org>,
 "Robert Richter" <rric@...nel.org>, "Yi1 Lai" <yi1.lai@...el.com>,
 "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC
 support

On Thu, Jul 24, 2025, at 19:23, Kyle Manna wrote:
> Hi Qiuxu,
>
> On Thu, Jul 24, 2025, at 07:31, Zhuo, Qiuxu wrote:
>> Do you have access to these machines to load the ie31200_edac
>> driver with your patch? If yes, would you take dmesg logs?
>
> I have access to a i5-12600K, here are the logs that I observed:
>
> $ dmesg | rg -i -e edac -e ecc -e ie31200 | rg -v systemd | rg edac
> [   14.379905] caller ie31200_init_one+0x1b5/0x480 [ie31200_edac] 
> mapping multiple BARs
> [   14.382709] EDAC MC0: Giving out device to module ie31200_edac 
> controller IE31200: DEV 0000:00:00.0 (INTERRUPT)
> [   14.383042] EDAC MC1: Giving out device to module ie31200_edac 
> controller IE31200_1: DEV 0000:00:00.0 (INTERRUPT)
>
> I posted additional logs from sysfs and "ras-mc-ctl" here[0] after I 
> learned that support was added for related processors as well as 
> discussion with other users trying to get W680 + ECC working.
>
> [0] 
> https://forums.servethehome.com/index.php?threads/intel-w680-ddr5-and-ecc-reporting.42559/#post-470425
>
>
>>> diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index
>>> a53612be4b2f..2078c12bbed2 100644
>>> --- a/drivers/edac/ie31200_edac.c
>>> +++ b/drivers/edac/ie31200_edac.c
>>> @@ -94,6 +94,8 @@
>>> 
>>>  /* Alder Lake-S */
>>>  #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
>>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668
>>> +#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648
>>> 
>>
>> I didn't find the place in your spec above that indicates these
>> two CPUs with these two DIDs have Out-Of-Band ECC capabilities.
>> Could you point it out to me?
>
> This Intel CPU page[1] lists ECC memory support and the same on the 
> Intel W680 chipset page[2]. The datasheet was used to confirm the 
> DIDs[3] were valid.
>
> [1] 
> https://www.intel.com/content/www/us/en/products/sku/134589/intel-core-i512600k-processor-20m-cache-up-to-4-90-ghz/specifications.html
> [2] 
> https://www.intel.com/content/www/us/en/products/sku/218834/intel-w680-chipset/specifications.html
> [3] 
> https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-desktop/12th-generation-intel-core-processors-datasheet-volume-1-of-2/011/device-ids/
>
> Given that you added the i9-12900k (0x4660) in 180f091224a00 and I've 
> personally verified the i5-12600k (0x4648) is working (see dmesg logs 
> above), I've added the i7-12700k (0x4668) to assist future users.

Hi Qiuxu and Borislav,

I saw a pull request[0] for a 14th gen version of the same chips and would love to get these 12th gen chips included as well.

Anything I can do to help this along?

[0] https://lore.kernel.org/lkml/20250728141521.GAaIeF-XYJVbfOQdT6@fat_crate.local/

Thanks!
 - Kyle

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