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Message-ID: <f815a5ff-920e-4842-9d6b-f4a11944b9b7@amlogic.com>
Date: Fri, 1 Aug 2025 10:40:06 +0800
From: Chuan Liu <chuan.liu@...ogic.com>
To: Stephen Boyd <sboyd@...nel.org>,
Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: Add fault tolerance to of_clk_hw_onecell_get()
Hi Stephen:
Thanks for the quick feedback. I'll improve the KUnit tests and send v2.
On 8/1/2025 12:45 AM, Stephen Boyd wrote:
> [ EXTERNAL EMAIL ]
>
> Quoting Chuan Liu via B4 Relay (2025-07-31 05:39:58)
>> From: Chuan Liu <chuan.liu@...ogic.com>
>>
>> In specific cases, even a clk_provider managing only a single clock may
>> reference of_clk_hw_onecell_get() to access its member clocks, as seen
>> in implementations like clk-scmi.
>>
>> For a clk_provider with only one clock, when calling
>> of_parse_phandle_with_args(), the phandle_args->args[] members are not
>> assigned. In this case, the reference to phandle_args->args[0] in
>> of_clk_hw_onecell_get() becomes invalid. If phandle_args->args[0]
>> initially contains a non-zero value, this will trigger an error.
>>
>> Signed-off-by: Chuan Liu <chuan.liu@...ogic.com>
>> ---
>> Error conditions observed:
>>
>> scmi_clk: protocol@14 {
>> reg = <0x14>;
>> #clock-cells = <0>;
>> };
>>
>> phandle1: clock-controller@1 {
>> #clock-cells = <1>;
>> }
>>
>> clock-consumer@2 {
>> assigned-clocks = <&phandle1 1>,
>> <&scmi_clk>;
>> assigned-clock-rates = <xxx>,
>> <xxx>;
>> }
>>
>> Under these conditions, executing of_clk_set_defaults() triggers the
>> error: 'of_clk_hw_onecell_get: invalid index 1'.
> Please write a KUnit test.
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