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Message-ID: <c5db278f-7fbf-45cf-8b6f-2f5604daf6ee@roeck-us.net>
Date: Sat, 2 Aug 2025 17:16:22 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Wolfram Sang <wsa+renesas@...g-engineering.com>,
 Wim Van Sebroeck <wim@...ux-watchdog.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
 Geert Uytterhoeven <geert+renesas@...der.be>,
 Magnus Damm <magnus.damm@...il.com>, linux-watchdog@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-renesas-soc@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
 Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
 Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 7/9] watchdog: rzv2h: Set min_timeout based on
 max_hw_heartbeat_ms

On 8/2/25 12:26, Lad, Prabhakar wrote:
> Hi Guenter,
> 
> On Fri, Aug 1, 2025 at 10:04 PM Guenter Roeck <linux@...ck-us.net> wrote:
>>
>> On 8/1/25 13:51, Lad, Prabhakar wrote:
>>> Hi Guenter,
>>>
>>> On Fri, Aug 1, 2025 at 7:04 PM Guenter Roeck <linux@...ck-us.net> wrote:
>>>>
>>>> On 8/1/25 08:30, Lad, Prabhakar wrote:
>>>>> Hi Guenter,
>>>>>
>>>>> On Fri, Aug 1, 2025 at 2:52 PM Guenter Roeck <linux@...ck-us.net> wrote:
>>>>>>
>>>>>> On 8/1/25 04:05, Lad, Prabhakar wrote:
>>>>>>> Hi Wolfram,
>>>>>>>
>>>>>>> Thank you for the review.
>>>>>>>
>>>>>>> On Fri, Aug 1, 2025 at 5:10 AM Wolfram Sang
>>>>>>> <wsa+renesas@...g-engineering.com> wrote:
>>>>>>>>
>>>>>>>> On Tue, Jul 29, 2025 at 04:59:13PM +0100, Prabhakar wrote:
>>>>>>>>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>>>>>>>>>
>>>>>>>>> Update the watchdog minimum timeout value to be derived from
>>>>>>>>> `max_hw_heartbeat_ms` using `DIV_ROUND_UP()` to ensure a valid and
>>>>>>>>> consistent minimum timeout in seconds.
>>>>>>>>
>>>>>>>> I don't understand this change. Why is the _minimum_ timeout based on
>>>>>>>> the _maximum_ heartbeat?
>>>>>>>>
>>>>>>> The reason for deriving min_timeout from max_hw_heartbeat_ms is to
>>>>>>> ensure the minimum watchdog period (in seconds) is compatible with the
>>>>>>> underlying hardware.
>>>>>>>
>>>>>>> max_hw_heartbeat_ms is calculated as:
>>>>>>> max_hw_heartbeat_ms = (1000 * 16384 * cks_div) / clk_rate;
>>>>>>>
>>>>>>> This value varies by SoC:
>>>>>>>      RZ/T2H: cks_div = 8192, clk ≈ 62.5 MHz -> max_hw_heartbeat_ms ~ 2147ms
>>>>>>>      RZ/V2H: cks_div = 256, clk ≈ 240 MHz -> max_hw_heartbeat_ms ~ 174ms
>>>>>>>
>>>>>>> Since min_timeout is in seconds, setting it to:
>>>>>>> min_timeout = DIV_ROUND_UP(max_hw_heartbeat_ms, 1000);
>>>>>>>
>>>>>>> ensures:
>>>>>>> The minimum timeout period is never less than what the hardware can support.
>>>>>>> - For T2H, this results in a min_timeout of 3s (2147ms -> 3s).
>>>>>>> - For V2H, it’s just 1s (174ms -> 1s).
>>>>>>>
>>>>>>
>>>>>> Sorry, I completely fail to understand the logic.
>>>>>>
>>>>>> If the maximum timeout is, say, 2 seconds, why would the hardware
>>>>>> not be able to support a timeout of 1 second ?
>>>>>>
>>>>> The watchdog timer on RZ/V2H (and RZ/T2H) is a 14 bit down counter. On
>>>>> initialization the down counters on the SoCs are configured to the max
>>>>> down counter. On RZ/V2H down counter value 4194304 (which evaluates to
>>>>> 174ms) is and on RZ/T2H is 134217728 (which evaluates to 2147ms). The
>>>>> board will be reset when we get an underflow error.
>>>>>
>>>>> So for example on T2H consider this example:
>>>>> - down counter is 134217728
>>>>> - min_timeout is set to 1 in the driver
>>>>> - When set  WDIOC_SETTIMEOUT to 1
>>>>> In this case the board will be reset after 2147ms, i.e. incorrect
>>>>> behaviour as we expect the board to be reset after 1 sec. Hence the
>>>>> min_timeout is set to 3s (2147ms -> 3s).
>>>>>
>>>>> Please let me know if my understanding of min_timeout is incorrect here.
>>>>>
>>>>
>>>> The driver is missing a set_timeout function. It should set RZ/T2H
>>>> to 62514079 if a timeout of 1 second is configured.
>>>>
>>> Ok, you mean to handle the 1sec case, introduce the set_timeout for RZ/T2H SoC.
>>>
>>> Although we cannot achieve the exact 1sec case as we can have only 4
>>> timeout period options (number of cycles):
>>>
>>> 1] For TIMEOUT_CYCLES = 1024
>>>    - (1000×1024×8192)/62500000 = 134.22 ms
>>> 2] For TIMEOUT_CYCLES = 4096
>>> - (1000×4096×8192)/62500000 = 536.87 ms
>>> 3] For TIMEOUT_CYCLES = 8192
>>> - (1000×8192×8192)/62500000 = 1,073.74 ms
>>> 4] For TIMEOUT_CYCLES = 16384
>>> - (1000×16384×8192)/62500000 = 2,147.48 ms
>>>
>>> So to handle the 1sec case I'll set the timeout period to 8192 with
>>> which we get a timeout of 1,073.74 ms.
>>>
>>
>> Just four possible values to set the hardware timeout ? That is an odd
>> hardware. In that case, you could also set the period to 1024 or 4096
>> and set max_hw_heartbeat_ms accordingly. That would avoid the rounding
>> error.
>>
> Yes sadly we have four timeout periods only. To clarify, you mean to
> set `max_hw_heartbeat_ms` in set_timeout?
> 

No, during initialization, and have no set_timeout function. max_hw_heartbeat_ms
is not supposed to change during runtime. If you do change it, the results
are undefined.

Guenter


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