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Message-ID: <83931f05-a613-4972-be76-80bc695915e4@oracle.com>
Date: Sun, 3 Aug 2025 12:08:09 -0700
From: Anthony Yznaga <anthony.yznaga@...cle.com>
To: John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>,
"Matthew Wilcox (Oracle)" <willy@...radead.org>,
linux-arch@...r.kernel.org
Cc: linux-mm@...ck.org, linux-kernel@...r.kernel.org,
"David S. Miller" <davem@...emloft.net>, sparclinux@...r.kernel.org,
Andreas Larsson <andreas@...sler.com>, Rod Schnell <rods@...radio.com>,
Sam James <sam@...too.org>
Subject: Re: [PATCH v4 25/36] sparc64: Implement the new page table range API
Hi Adrian,
On 8/3/25 5:05 AM, John Paul Adrian Glaubitz wrote:
> Hi Matthew,
>
> On Wed, 2023-03-15 at 05:14 +0000, Matthew Wilcox (Oracle) wrote:
>> Add set_ptes(), update_mmu_cache_range(), flush_dcache_folio() and
>> flush_icache_pages(). Convert the PG_dcache_dirty flag from being
>> per-page to per-folio.
>>
>> Signed-off-by: Matthew Wilcox (Oracle) <willy@...radead.org>
>> Cc: "David S. Miller" <davem@...emloft.net>
>> Cc: sparclinux@...r.kernel.org
>> ---
>> arch/sparc/include/asm/cacheflush_64.h | 18 ++++--
>> arch/sparc/include/asm/pgtable_64.h | 24 ++++++--
>> arch/sparc/kernel/smp_64.c | 56 +++++++++++-------
>> arch/sparc/mm/init_64.c | 78 +++++++++++++++-----------
>> arch/sparc/mm/tlb.c | 5 +-
>> 5 files changed, 116 insertions(+), 65 deletions(-)
>>
>> diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h
>> index b9341836597e..a9a719f04d06 100644
>> --- a/arch/sparc/include/asm/cacheflush_64.h
>> +++ b/arch/sparc/include/asm/cacheflush_64.h
>> @@ -35,20 +35,26 @@ void flush_icache_range(unsigned long start, unsigned long end);
>> void __flush_icache_page(unsigned long);
>>
>> void __flush_dcache_page(void *addr, int flush_icache);
>> -void flush_dcache_page_impl(struct page *page);
>> +void flush_dcache_folio_impl(struct folio *folio);
>> #ifdef CONFIG_SMP
>> -void smp_flush_dcache_page_impl(struct page *page, int cpu);
>> -void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
>> +void smp_flush_dcache_folio_impl(struct folio *folio, int cpu);
>> +void flush_dcache_folio_all(struct mm_struct *mm, struct folio *folio);
>> #else
>> -#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
>> -#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
>> +#define smp_flush_dcache_folio_impl(folio, cpu) flush_dcache_folio_impl(folio)
>> +#define flush_dcache_folio_all(mm, folio) flush_dcache_folio_impl(folio)
>> #endif
>>
>> void __flush_dcache_range(unsigned long start, unsigned long end);
>> #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
>> -void flush_dcache_page(struct page *page);
>> +void flush_dcache_folio(struct folio *folio);
>> +#define flush_dcache_folio flush_dcache_folio
>> +static inline void flush_dcache_page(struct page *page)
>> +{
>> + flush_dcache_folio(page_folio(page));
>> +}
>>
>> #define flush_icache_page(vma, pg) do { } while(0)
>> +#define flush_icache_pages(vma, pg, nr) do { } while(0)
>>
>> void flush_ptrace_access(struct vm_area_struct *, struct page *,
>> unsigned long uaddr, void *kaddr,
>> diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
>> index 2dc8d4641734..49c37000e1b1 100644
>> --- a/arch/sparc/include/asm/pgtable_64.h
>> +++ b/arch/sparc/include/asm/pgtable_64.h
>> @@ -911,8 +911,19 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
>> maybe_tlb_batch_add(mm, addr, ptep, orig, fullmm, PAGE_SHIFT);
>> }
>>
>> -#define set_pte_at(mm,addr,ptep,pte) \
>> - __set_pte_at((mm), (addr), (ptep), (pte), 0)
>> +static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
>> + pte_t *ptep, pte_t pte, unsigned int nr)
>> +{
>> + for (;;) {
>> + __set_pte_at(mm, addr, ptep, pte, 0);
>> + if (--nr == 0)
>> + break;
>> + ptep++;
>> + pte_val(pte) += PAGE_SIZE;
>> + addr += PAGE_SIZE;
>> + }
>> +}
>> +#define set_ptes set_ptes
>>
>> #define pte_clear(mm,addr,ptep) \
>> set_pte_at((mm), (addr), (ptep), __pte(0UL))
>> @@ -931,8 +942,8 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
>> \
>> if (pfn_valid(this_pfn) && \
>> (((old_addr) ^ (new_addr)) & (1 << 13))) \
>> - flush_dcache_page_all(current->mm, \
>> - pfn_to_page(this_pfn)); \
>> + flush_dcache_folio_all(current->mm, \
>> + page_folio(pfn_to_page(this_pfn))); \
>> } \
>> newpte; \
>> })
>> @@ -947,7 +958,10 @@ struct seq_file;
>> void mmu_info(struct seq_file *);
>>
>> struct vm_area_struct;
>> -void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
>> +void update_mmu_cache_range(struct vm_area_struct *, unsigned long addr,
>> + pte_t *ptep, unsigned int nr);
>> +#define update_mmu_cache(vma, addr, ptep) \
>> + update_mmu_cache_range(vma, addr, ptep, 1)
>> #ifdef CONFIG_TRANSPARENT_HUGEPAGE
>> void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
>> pmd_t *pmd);
>> diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
>> index a55295d1b924..90ef8677ac89 100644
>> --- a/arch/sparc/kernel/smp_64.c
>> +++ b/arch/sparc/kernel/smp_64.c
>> @@ -921,20 +921,26 @@ extern unsigned long xcall_flush_dcache_page_cheetah;
>> #endif
>> extern unsigned long xcall_flush_dcache_page_spitfire;
>>
>> -static inline void __local_flush_dcache_page(struct page *page)
>> +static inline void __local_flush_dcache_folio(struct folio *folio)
>> {
>> + unsigned int i, nr = folio_nr_pages(folio);
>> +
>> #ifdef DCACHE_ALIASING_POSSIBLE
>> - __flush_dcache_page(page_address(page),
>> + for (i = 0; i < nr; i++)
>> + __flush_dcache_page(folio_address(folio) + i * PAGE_SIZE,
>> ((tlb_type == spitfire) &&
>> - page_mapping_file(page) != NULL));
>> + folio_flush_mapping(folio) != NULL));
>> #else
>> - if (page_mapping_file(page) != NULL &&
>> - tlb_type == spitfire)
>> - __flush_icache_page(__pa(page_address(page)));
>> + if (folio_flush_mapping(folio) != NULL &&
>> + tlb_type == spitfire) {
>> + unsigned long pfn = folio_pfn(folio)
>> + for (i = 0; i < nr; i++)
>> + __flush_icache_page((pfn + i) * PAGE_SIZE);
>> + }
>> #endif
>> }
>>
>> -void smp_flush_dcache_page_impl(struct page *page, int cpu)
>> +void smp_flush_dcache_folio_impl(struct folio *folio, int cpu)
>> {
>> int this_cpu;
>>
>> @@ -948,14 +954,14 @@ void smp_flush_dcache_page_impl(struct page *page, int cpu)
>> this_cpu = get_cpu();
>>
>> if (cpu == this_cpu) {
>> - __local_flush_dcache_page(page);
>> + __local_flush_dcache_folio(folio);
>> } else if (cpu_online(cpu)) {
>> - void *pg_addr = page_address(page);
>> + void *pg_addr = folio_address(folio);
>> u64 data0 = 0;
>>
>> if (tlb_type == spitfire) {
>> data0 = ((u64)&xcall_flush_dcache_page_spitfire);
>> - if (page_mapping_file(page) != NULL)
>> + if (folio_flush_mapping(folio) != NULL)
>> data0 |= ((u64)1 << 32);
>> } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
>> #ifdef DCACHE_ALIASING_POSSIBLE
>> @@ -963,18 +969,23 @@ void smp_flush_dcache_page_impl(struct page *page, int cpu)
>> #endif
>> }
>> if (data0) {
>> - xcall_deliver(data0, __pa(pg_addr),
>> - (u64) pg_addr, cpumask_of(cpu));
>> + unsigned int i, nr = folio_nr_pages(folio);
>> +
>> + for (i = 0; i < nr; i++) {
>> + xcall_deliver(data0, __pa(pg_addr),
>> + (u64) pg_addr, cpumask_of(cpu));
>> #ifdef CONFIG_DEBUG_DCFLUSH
>> - atomic_inc(&dcpage_flushes_xcall);
>> + atomic_inc(&dcpage_flushes_xcall);
>> #endif
>> + pg_addr += PAGE_SIZE;
>> + }
>> }
>> }
>>
>> put_cpu();
>> }
>>
>> -void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
>> +void flush_dcache_folio_all(struct mm_struct *mm, struct folio *folio)
>> {
>> void *pg_addr;
>> u64 data0;
>> @@ -988,10 +999,10 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
>> atomic_inc(&dcpage_flushes);
>> #endif
>> data0 = 0;
>> - pg_addr = page_address(page);
>> + pg_addr = folio_address(folio);
>> if (tlb_type == spitfire) {
>> data0 = ((u64)&xcall_flush_dcache_page_spitfire);
>> - if (page_mapping_file(page) != NULL)
>> + if (folio_flush_mapping(folio) != NULL)
>> data0 |= ((u64)1 << 32);
>> } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
>> #ifdef DCACHE_ALIASING_POSSIBLE
>> @@ -999,13 +1010,18 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
>> #endif
>> }
>> if (data0) {
>> - xcall_deliver(data0, __pa(pg_addr),
>> - (u64) pg_addr, cpu_online_mask);
>> + unsigned int i, nr = folio_nr_pages(folio);
>> +
>> + for (i = 0; i < nr; i++) {
>> + xcall_deliver(data0, __pa(pg_addr),
>> + (u64) pg_addr, cpu_online_mask);
>> #ifdef CONFIG_DEBUG_DCFLUSH
>> - atomic_inc(&dcpage_flushes_xcall);
>> + atomic_inc(&dcpage_flushes_xcall);
>> #endif
>> + pg_addr += PAGE_SIZE;
>> + }
>> }
>> - __local_flush_dcache_page(page);
>> + __local_flush_dcache_folio(folio);
>>
>> preempt_enable();
>> }
>> diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
>> index 04f9db0c3111..ab9aacbaf43c 100644
>> --- a/arch/sparc/mm/init_64.c
>> +++ b/arch/sparc/mm/init_64.c
>> @@ -195,21 +195,26 @@ atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
>> #endif
>> #endif
>>
>> -inline void flush_dcache_page_impl(struct page *page)
>> +inline void flush_dcache_folio_impl(struct folio *folio)
>> {
>> + unsigned int i, nr = folio_nr_pages(folio);
>> +
>> BUG_ON(tlb_type == hypervisor);
>> #ifdef CONFIG_DEBUG_DCFLUSH
>> atomic_inc(&dcpage_flushes);
>> #endif
>>
>> #ifdef DCACHE_ALIASING_POSSIBLE
>> - __flush_dcache_page(page_address(page),
>> - ((tlb_type == spitfire) &&
>> - page_mapping_file(page) != NULL));
>> + for (i = 0; i < nr; i++)
>> + __flush_dcache_page(folio_address(folio) + i * PAGE_SIZE,
>> + ((tlb_type == spitfire) &&
>> + folio_flush_mapping(folio) != NULL));
>> #else
>> - if (page_mapping_file(page) != NULL &&
>> - tlb_type == spitfire)
>> - __flush_icache_page(__pa(page_address(page)));
>> + if (folio_flush_mapping(folio) != NULL &&
>> + tlb_type == spitfire) {
>> + for (i = 0; i < nr; i++)
>> + __flush_icache_page((pfn + i) * PAGE_SIZE);
>> + }
>> #endif
>> }
>>
>> @@ -218,10 +223,10 @@ inline void flush_dcache_page_impl(struct page *page)
>> #define PG_dcache_cpu_mask \
>> ((1UL<<ilog2(roundup_pow_of_two(NR_CPUS)))-1UL)
>>
>> -#define dcache_dirty_cpu(page) \
>> - (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
>> +#define dcache_dirty_cpu(folio) \
>> + (((folio)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
>>
>> -static inline void set_dcache_dirty(struct page *page, int this_cpu)
>> +static inline void set_dcache_dirty(struct folio *folio, int this_cpu)
>> {
>> unsigned long mask = this_cpu;
>> unsigned long non_cpu_bits;
>> @@ -238,11 +243,11 @@ static inline void set_dcache_dirty(struct page *page, int this_cpu)
>> "bne,pn %%xcc, 1b\n\t"
>> " nop"
>> : /* no outputs */
>> - : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
>> + : "r" (mask), "r" (non_cpu_bits), "r" (&folio->flags)
>> : "g1", "g7");
>> }
>>
>> -static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
>> +static inline void clear_dcache_dirty_cpu(struct folio *folio, unsigned long cpu)
>> {
>> unsigned long mask = (1UL << PG_dcache_dirty);
>>
>> @@ -260,7 +265,7 @@ static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
>> " nop\n"
>> "2:"
>> : /* no outputs */
>> - : "r" (cpu), "r" (mask), "r" (&page->flags),
>> + : "r" (cpu), "r" (mask), "r" (&folio->flags),
>> "i" (PG_dcache_cpu_mask),
>> "i" (PG_dcache_cpu_shift)
>> : "g1", "g7");
>> @@ -284,9 +289,10 @@ static void flush_dcache(unsigned long pfn)
>>
>> page = pfn_to_page(pfn);
>> if (page) {
>> + struct folio *folio = page_folio(page);
>> unsigned long pg_flags;
>>
>> - pg_flags = page->flags;
>> + pg_flags = folio->flags;
>> if (pg_flags & (1UL << PG_dcache_dirty)) {
>> int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
>> PG_dcache_cpu_mask);
>> @@ -296,11 +302,11 @@ static void flush_dcache(unsigned long pfn)
>> * in the SMP case.
>> */
>> if (cpu == this_cpu)
>> - flush_dcache_page_impl(page);
>> + flush_dcache_folio_impl(folio);
>> else
>> - smp_flush_dcache_page_impl(page, cpu);
>> + smp_flush_dcache_folio_impl(folio, cpu);
>>
>> - clear_dcache_dirty_cpu(page, cpu);
>> + clear_dcache_dirty_cpu(folio, cpu);
>>
>> put_cpu();
>> }
>> @@ -388,12 +394,14 @@ bool __init arch_hugetlb_valid_size(unsigned long size)
>> }
>> #endif /* CONFIG_HUGETLB_PAGE */
>>
>> -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
>> +void update_mmu_cache_range(struct vm_area_struct *vma, unsigned long address,
>> + pte_t *ptep, unsigned int nr)
>> {
>> struct mm_struct *mm;
>> unsigned long flags;
>> bool is_huge_tsb;
>> pte_t pte = *ptep;
>> + unsigned int i;
>>
>> if (tlb_type != hypervisor) {
>> unsigned long pfn = pte_pfn(pte);
>> @@ -440,15 +448,21 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
>> }
>> }
>> #endif
>> - if (!is_huge_tsb)
>> - __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,
>> - address, pte_val(pte));
>> + if (!is_huge_tsb) {
>> + for (i = 0; i < nr; i++) {
>> + __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,
>> + address, pte_val(pte));
>> + address += PAGE_SIZE;
>> + pte_val(pte) += PAGE_SIZE;
>> + }
>> + }
>>
>> spin_unlock_irqrestore(&mm->context.lock, flags);
>> }
>>
>> -void flush_dcache_page(struct page *page)
>> +void flush_dcache_folio(struct folio *folio)
>> {
>> + unsigned long pfn = folio_pfn(folio);
>> struct address_space *mapping;
>> int this_cpu;
>>
>> @@ -459,35 +473,35 @@ void flush_dcache_page(struct page *page)
>> * is merely the zero page. The 'bigcore' testcase in GDB
>> * causes this case to run millions of times.
>> */
>> - if (page == ZERO_PAGE(0))
>> + if (is_zero_pfn(pfn))
>> return;
>>
>> this_cpu = get_cpu();
>>
>> - mapping = page_mapping_file(page);
>> + mapping = folio_flush_mapping(folio);
>> if (mapping && !mapping_mapped(mapping)) {
>> - int dirty = test_bit(PG_dcache_dirty, &page->flags);
>> + bool dirty = test_bit(PG_dcache_dirty, &folio->flags);
>> if (dirty) {
>> - int dirty_cpu = dcache_dirty_cpu(page);
>> + int dirty_cpu = dcache_dirty_cpu(folio);
>>
>> if (dirty_cpu == this_cpu)
>> goto out;
>> - smp_flush_dcache_page_impl(page, dirty_cpu);
>> + smp_flush_dcache_folio_impl(folio, dirty_cpu);
>> }
>> - set_dcache_dirty(page, this_cpu);
>> + set_dcache_dirty(folio, this_cpu);
>> } else {
>> /* We could delay the flush for the !page_mapping
>> * case too. But that case is for exec env/arg
>> * pages and those are %99 certainly going to get
>> * faulted into the tlb (and thus flushed) anyways.
>> */
>> - flush_dcache_page_impl(page);
>> + flush_dcache_folio_impl(folio);
>> }
>>
>> out:
>> put_cpu();
>> }
>> -EXPORT_SYMBOL(flush_dcache_page);
>> +EXPORT_SYMBOL(flush_dcache_folio);
>>
>> void __kprobes flush_icache_range(unsigned long start, unsigned long end)
>> {
>> @@ -2280,10 +2294,10 @@ void __init paging_init(void)
>> setup_page_offset();
>>
>> /* These build time checkes make sure that the dcache_dirty_cpu()
>> - * page->flags usage will work.
>> + * folio->flags usage will work.
>> *
>> * When a page gets marked as dcache-dirty, we store the
>> - * cpu number starting at bit 32 in the page->flags. Also,
>> + * cpu number starting at bit 32 in the folio->flags. Also,
>> * functions like clear_dcache_dirty_cpu use the cpu mask
>> * in 13-bit signed-immediate instruction fields.
>> */
>> diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
>> index 9a725547578e..3fa6a070912d 100644
>> --- a/arch/sparc/mm/tlb.c
>> +++ b/arch/sparc/mm/tlb.c
>> @@ -118,6 +118,7 @@ void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
>> unsigned long paddr, pfn = pte_pfn(orig);
>> struct address_space *mapping;
>> struct page *page;
>> + struct folio *folio;
>>
>> if (!pfn_valid(pfn))
>> goto no_cache_flush;
>> @@ -127,13 +128,13 @@ void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
>> goto no_cache_flush;
>>
>> /* A real file page? */
>> - mapping = page_mapping_file(page);
>> + mapping = folio_flush_mapping(folio);
>> if (!mapping)
>> goto no_cache_flush;
>>
>> paddr = (unsigned long) page_address(page);
>> if ((paddr ^ vaddr) & (1 << 13))
>> - flush_dcache_page_all(mm, page);
>> + flush_dcache_folio_all(mm, folio);
>> }
>>
>> no_cache_flush:
>
> This change broke the kernel on sun4u SPARC systems. This has been observed on a Sun Netra 240.
>
> During boot, the kernel crashes with:
>
> [ 25.855163] Unable to handle kernel NULL pointer dereference
> [ 25.929588] tsk->{mm,active_mm}->context = 0000000000000001
> [ 26.002772] tsk->{mm,active_mm}->pgd = fff00000001bc000
> [ 26.071405] \|/ ____ \|/
> [ 26.071405] "@'/ .. \`@"
> [ 26.071405] /_| \__/ |_\
> [ 26.071405] \__U_/
> [ 26.264705] modprobe(33): Oops [#1]
> [ 26.310445] CPU: 0 PID: 33 Comm: modprobe Not tainted 6.5.0-rc4+ #16
> [ 26.393937] TSTATE: 0000004411001601 TPC: 0000000000452a28 TNPC: 0000000000452a2c Y: 00000008 Not tainted
> [ 26.523184] TPC: <tlb_batch_add+0x108/0x1a0>
> [ 26.579221] g0: ace36c1f2cee4067 g1: 0000000000000028 g2: 00000000000a010c g3: 000c000000000000
> [ 26.693607] g4: fff0000001947000 g5: 0000000000000000 g6: fff0000001948000 g7: fff000023fe33f00
> [ 26.807978] o0: fff000000738fff8 o1: 000007feffffe000 o2: fff000000194b788 o3: 0000000000e3c038
> [ 26.922356] o4: ffffffffffffffff o5: 0000000000e3c038 sp: fff000000194aee1 ret_pc: 000000000065d194
> [ 27.041302] RPC: <__pte_offset_map_lock+0x14/0x60>
> [ 27.104203] l0: fff000000194b860 l1: 0000000000000001 l2: 0000000000000000 l3: fff000000194b850
> [ 27.218583] l4: 0000000000002000 l5: 00000000001010f8 l6: 0000000000000002 l7: 0000000000000040
> [ 27.332959] i0: fff000000194e400 i1: 000007feffffe000 i2: 000c000004857588 i3: 80000002026d3fb2
> [ 27.447334] i4: 0000000000000000 i5: 000000000000000d i6: fff000000194af91 i7: 0000000000659110
> [ 27.561709] I7: <change_protection+0x910/0xe00>
> [ 27.621178] Call Trace:
> [ 27.653202] [<0000000000659110>] change_protection+0x910/0xe00
> [ 27.729838] [<00000000006596f4>] mprotect_fixup+0xf4/0x2c0
> [ 27.801892] [<00000000006c754c>] setup_arg_pages+0x12c/0x2c0
> [ 27.876237] [<0000000000737d80>] load_elf_binary+0x360/0x1380
> [ 27.951722] [<00000000006c8564>] bprm_execve+0x1e4/0x560
> [ 28.021493] [<00000000006c8e8c>] kernel_execve+0x14c/0x200
> [ 28.093548] [<000000000047f6e8>] call_usermodehelper_exec_async+0xa8/0x140
> [ 28.183906] [<0000000000405fc8>] ret_from_fork+0x1c/0x2c
> [ 28.253672] [<0000000000000000>] 0x0
> [ 28.300568] Disabling lock debugging due to kernel taint
> [ 28.370336] Caller[0000000000659110]: change_protection+0x910/0xe00
> [ 28.452686] Caller[00000000006596f4]: mprotect_fixup+0xf4/0x2c0
> [ 28.530461] Caller[00000000006c754c]: setup_arg_pages+0x12c/0x2c0
> [ 28.610524] Caller[0000000000737d80]: load_elf_binary+0x360/0x1380
> [ 28.691730] Caller[00000000006c8564]: bprm_execve+0x1e4/0x560
> [ 28.767218] Caller[00000000006c8e8c]: kernel_execve+0x14c/0x200
> [ 28.844993] Caller[000000000047f6e8]: call_usermodehelper_exec_async+0xa8/0x140
> [ 28.941071] Caller[0000000000405fc8]: ret_from_fork+0x1c/0x2c
> [ 29.016554] Caller[0000000000000000]: 0x0
> [ 29.069167] Instruction DUMP:
> [ 29.069169] 80886001
> [ 29.108052] 126fffc8
> [ 29.138932] 01000000
> [ 29.169815] <c2582000>
> [ 29.200697] 83307013
> [ 29.231578] 80886001
> [ 29.262458] 02680007
> [ 29.293338] 01000000
> [ 29.324223] c2582000
> [ 29.355102]
>
> This crash is not observed on sun4v systems.
>
> Any idea what could be the fix?
There was a follow-on fix that addressed a bug with this patch:
f4b4f3ec1a31 sparc64: add missing initialization of folio in tlb_batch_add()
Anthony
>
> Adrian
>
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