| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20250804100219.63325-14-varshini.rajendran@microchip.com>
Date: Mon, 4 Aug 2025 15:32:17 +0530
From: Varshini Rajendran <varshini.rajendran@...rochip.com>
To: <eugen.hristev@...aro.org>, <jic23@...nel.org>, <dlechner@...libre.com>,
<nuno.sa@...log.com>, <andy@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <nicolas.ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>, <claudiu.beznea@...on.dev>,
<srini@...nel.org>, <linux-iio@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: <varshini.rajendran@...rochip.com>
Subject: [PATCH 13/15] ARM: dts: microchip: sama7d65: add cells for temperature calibration
Add NVMEM cell to ADC for temperature calibration data.
Signed-off-by: Varshini Rajendran <varshini.rajendran@...rochip.com>
---
arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 1d3708c76202..5d1f6684f64f 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -226,6 +226,8 @@ adc: adc@...00000 {
atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
atmel,startup-time-ms = <4>;
#io-channel-cells = <1>;
+ nvmem-cells = <&temperature_calib>;
+ nvmem-cell-names = "temperature_calib";
status = "disabled";
};
--
2.34.1
Powered by blists - more mailing lists