linux-kernel - Re: [PATCH 3/3] clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL

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Message-ID: <CAMuHMdXfGg6KfKt4dGf8NrboEPXF7fnq+dcM=sppYcgcq3csvw@mail.gmail.com>
Date: Mon, 4 Aug 2025 12:18:36 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: mturquette@...libre.com, sboyd@...nel.org, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 3/3] clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL

Hi Claudiu,

On Fri, 4 Jul 2025 at 15:43, Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Add MSTOP configuration for all the module clocks on the RZ/G2UL
> based SoCs (RZ/G2UL, RZ/V2L, RZ/Five).
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

Thanks for your patch!

> --- a/drivers/clk/renesas/r9a07g043-cpg.c
> +++ b/drivers/clk/renesas/r9a07g043-cpg.c
>         DEF_MOD("canfd",        R9A07G043_CANFD_PCLK, R9A07G043_CLK_P0,
> -                               0x594, 0, 0),
> +                               0x594, 0, MSTOP(BUS_MCPU2, BIT(9))),
>         DEF_MOD("gpio",         R9A07G043_GPIO_HCLK, R9A07G043_OSCCLK,
>                                 0x598, 0, 0),

MSTOP(BUS_PERI_CPU, BIT(6))?

>         DEF_MOD("adc_adclk",    R9A07G043_ADC_ADCLK, R9A07G043_CLK_TSU,
> -                               0x5a8, 0, 0),
> +                               0x5a8, 0, MSTOP(BUS_MCPU2, BIT(14))),

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds