linux-kernel - Re: Aquantia PHY in OCSGMII mode?

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Message-ID: <aJCvOHDUv8iVNXkb@FUE-ALEWI-WINX>
Date: Mon, 4 Aug 2025 15:01:44 +0200
From: Alexander Wilhelm <alexander.wilhelm@...termo.com>
To: Vladimir Oltean <vladimir.oltean@....com>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
        Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: Aquantia PHY in OCSGMII mode?

Am Mon, Aug 04, 2025 at 01:01:39PM +0300 schrieb Vladimir Oltean:
> On Mon, Aug 04, 2025 at 08:17:47AM +0200, Alexander Wilhelm wrote:
> > Am Fri, Aug 01, 2025 at 04:04:20PM +0300 schrieb Vladimir Oltean:
> > > On Fri, Aug 01, 2025 at 01:23:44PM +0100, Russell King (Oracle) wrote:
> > > > It looks like memac_select_pcs() and memac_prepare() fail to
> > > > handle 2500BASEX despite memac_initialization() suggesting the
> > > > SGMII PCS supports 2500BASEX.
> > > 
> > > Thanks for pointing this out, it seems to be a regression introduced by
> > > commit 5d93cfcf7360 ("net: dpaa: Convert to phylink").
> > > 
> > > If there are no other volunteers, I can offer to submit a patch if
> > > Alexander confirms this fixes his setup.
> > 
> > I'd be happy to help by applying the patch on my system and running some tests.
> > Please let me know if there are any specific steps or scenarios you'd like me to
> > focus on.
> > 
> > Best regards
> > Alexander Wilhelm
> 
> Please find the attached patch.
[...]

Hi Vladimir,

I’ve applied the patch you provided, but it doesn’t seem to fully resolve the
issue -- or perhaps I’ve misconfigured something. I’m encountering the following
error during initialization:

    mdio_bus 0x0000000ffe4e7000:00: AN not supported on 3.125GHz SerDes lane
    fsl_dpaa_mac ffe4e6000.ethernet eth0: pcs_config failed: -EOPNOTSUPP

The relevant code is located in `drivers/net/pcs/pcs-lynx.c`, within the
`lynx_pcs_config(...)` function. In the case of 2500BASE-X with in-band
autonegotiation enabled, the function logs an error and returns -EOPNOTSUPP.

>From what I can tell, autonegotiation isn’t supported on a 3.125GHz SerDes lane
when using 2500BASE-X. What I’m unclear about is how this setup is supposed to
work in practice. My understanding is that on the host side, communication
always uses OCSGMII with flow control, allowing speed pacing via pause frames.
But what about the line side -- should it be configurable, or is it expected to
operate in a fixed mode?

> For debugging, I recommend dumping /proc/device-tree/soc/fman@...0000/ethernet@...00/
> (node may change for different MAC) to make sure that all the required
> properties are there, i.e. phy-handle, phy-connection-type, pcsphy-handle.
[...]

I decompiled the running device tree. Below are the excerpt from the resulting file:

    /dts-v1/;

    / {
        soc@...000000 {
            fman@...000 {
                ethernet@...00 {
                    phy-handle = <0x0f>;
                    compatible = "fsl,fman-memac";
                    mac-address = [00 00 5b 05 a2 cb];
                    local-mac-address = [00 00 5b 05 a2 cb];
                    fsl,fman-ports = <0x0b 0x0c>;
                    ptp-timer = <0x0a>;
                    status = "okay";
                    pcsphy-handle = <0x0d 0x0e>;
                    reg = <0xe6000 0x1000>;
                    phy-connection-type = "2500base-x";
                    sleep = <0x10 0x10000000>;
                    pcs-handle-names = "sgmii", "qsgmii";
                    cell-index = <0x03>;
                };

                mdio@...00 {
                    fsl,erratum-a009885;
                    compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
                    status = "okay";
                    #address-cells = <0x01>;
                    #size-cells = <0x00>;
                    reg = <0xfd000 0x1000>;

                    ethernet-phy@7 {
                        compatible = "ethernet-phy-id31c3.1c63";
                        phandle = <0x0f>;
                        reg = <0x07>;
                    };
                };
            };
        };
    };

Let me know how I can assist further -- do you need any additional information from my side?


Best regards
Alexander Wilhelm