| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250805115216.3798121-1-pritam.sutar@samsung.com>
Date: Tue, 5 Aug 2025 17:22:10 +0530
From: Pritam Manohar Sutar <pritam.sutar@...sung.com>
To: vkoul@...nel.org, kishon@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, alim.akhtar@...sung.com,
andre.draszik@...aro.org, peter.griffin@...aro.org, kauschluss@...root.org,
ivo.ivanov.ivanov1@...il.com, igor.belwon@...tallysanemainliners.org,
m.szyprowski@...sung.com, s.nawrocki@...sung.com, pritam.sutar@...sung.com
Cc: linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, rosa.pila@...sung.com,
dev.tailor@...sung.com, faraz.ata@...sung.com, muhammed.ali@...sung.com,
selvarasu.g@...sung.com
Subject: [PATCH v5 0/6] initial usbdrd phy support for Exynosautov920 soc
This SoC has a single USB 3.1 DRD combo phy and three USB2.0 only
DRD phy controllers as mentined below
* Combo phy supports USB3.1 SSP+(10Gbps) protocol and is backwards
compatible to the USB3.0 SS(5Gbps). 'Add-on USB2.0' phy is added
to support USB2.0 HS(480Mbps), FS(12Mbps) and LS(1.5Mbps) data rates.
These two phys are combined to form a combo phy as mentioned below.
USB30DRD_0 port
+------------------------------------------------------------+
| |
| (combo) USB phy controller |
| +----------------------------------------------+ |
| | USB HSPHY | |
| | (samsung,exynosautov920-usbdrd-combo-hsphy) | |
| +----------------------------------------------+ |
| |
| +--------------------------------------------------+ |
| | USB SSPHY | |
| | (samsung,exynosautov920-usb31drd-combo-ssphy) | |
| +--------------------------------------------------+- |
| |
+------------------------------------------------------------+
| USBDRD30 Link |
| Controller |
+------------------------------------------------------------+
* USB2.0 phy supports only UTMI+ interface. USB2.0DRD phy
is very similar to the existing Exynos850 support in this driver.
USB20DRD_0/1/2 ports
+---------------------------------------------------+
| |
| USB PHY controller |
| +-----------------------------------------+ |
| | USB HSPHY | |
| | (samsung,exynosautov920-usbdrd-phy) | |
| +-----------------------------------------+ |
| |
+---------------------------------------------------+
| USBDRD20_* Link |
| Controller |
+---------------------------------------------------+
The "USB20 phy output isolation" is shared across the USB20 phys.
We have to bypass isolation when any one of the USBs is configured
and enable it when all are turned off. The "USB31 phy isolation"
is seperate for USB31 phy.
There are 3 types of the phys in this SoC as mentioned in above
above block diagram.
- one is simmilar with exynos850 as mentioned in patch no.1.
- second supports only USB2.0 HS as in patch no 3.
- third supports only USB3.1 SSP+ and denoted in patch no 5.
These three phys(usbdrd-phy, combo-hsphy, combo-ssphy) are totally
deferent, "NOT" same, hence added three compatible for three phys.
This patchset only supports device mode and same is verified with
as NCM device.
changelog
----------
Changes in v5:
- removed "Reviewed-by" tag.
- addressed comments from v4 patchset.
- DTS style is corrected and added required supplies in code
and schema.
- new schema block added for supplies to resolve below failure
during 'dtbs_check'.
Unevaluated properties are not allowed ('dvdd075-usb-supply', 'vdd18-usb20-supply', 'vdd33-usb20-supply' were unexpected.
- removed usage_counter(will take this later in subsequent patch-sets)
link for v4: https://lore.kernel.org/linux-phy/20250701120706.2219355-1-pritam.sutar@samsung.com/
Changes in v4:
- addressed comments from v3 patchset
- removed dts related patches, to be posted in new patchset.
- added regulator, pmu and power sequences.
- phy isol is shared across USBs, added usage counter to bypass or
enable phy isolation.
- modified schemas with hs and combo phy compatible names
(used "combo" to denote combo phy) and regulators
- modified code to work with binding and unbinding devices/drivers
- added "Reviewed-by" tag.
link for v3: https://lore.kernel.org/linux-phy/20250613055613.866909-1-pritam.sutar@samsung.com/
Changes in v3:
- Updated dt-bindings for USB2.0 only.
- Added dt-bindings for combo phy.
- Added implementation for combo phy (SS and HS phy).
- Added added DTS nodes for all the phys
link for v2: https://lore.kernel.org/linux-phy/20250516102650.2144487-1-pritam.sutar@samsung.com/
Changes in v2:
- Used standard GENMASK() and FIELD_GET() to get the major version
from controller version register.
link for v1: https://lore.kernel.org/linux-phy/20250514134813.380807-1-pritam.sutar@samsung.com/
Pritam Manohar Sutar (6):
dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 HS phy
compatible
phy: exynos5-usbdrd: support HS phy for ExynosAutov920
dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo hsphy
phy: exynos5-usbdrd: support HS combo phy for ExynosAutov920
dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo ssphy
phy: exynos5-usbdrd: support SS combo phy for ExynosAutov920
.../bindings/phy/samsung,usb3-drd-phy.yaml | 41 ++
drivers/phy/samsung/phy-exynos5-usbdrd.c | 652 ++++++++++++++++++
include/linux/soc/samsung/exynos-regs-pmu.h | 3 +
3 files changed, 696 insertions(+)
--
2.34.1
Powered by blists - more mailing lists