>From 17b74539f4f1fe2c335505443d797a9e2ae1fab8 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean Date: Tue, 5 Aug 2025 12:54:01 +0300 Subject: [PATCH] net: phy: aquantia: dump Global System Configuration registers Signed-off-by: Vladimir Oltean --- drivers/net/phy/aquantia/aquantia.h | 5 +++++ drivers/net/phy/aquantia/aquantia_main.c | 18 ++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/drivers/net/phy/aquantia/aquantia.h b/drivers/net/phy/aquantia/aquantia.h index 0c78bfabace5..9d02f9f0b8b7 100644 --- a/drivers/net/phy/aquantia/aquantia.h +++ b/drivers/net/phy/aquantia/aquantia.h @@ -55,10 +55,15 @@ #define VEND1_GLOBAL_CFG_SERDES_MODE_SGMII 3 #define VEND1_GLOBAL_CFG_SERDES_MODE_OCSGMII 4 #define VEND1_GLOBAL_CFG_SERDES_MODE_XFI5G 6 +#define VEND1_GLOBAL_CFG_AUTONEG_ENA BIT(3) +#define VEND1_GLOBAL_CFG_TRAINING_ENA BIT(4) +#define VEND1_GLOBAL_CFG_RESET_ON_TRANSITION BIT(5) +#define VEND1_GLOBAL_CFG_SERDES_SILENCE BIT(6) #define VEND1_GLOBAL_CFG_RATE_ADAPT GENMASK(8, 7) #define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE 0 #define VEND1_GLOBAL_CFG_RATE_ADAPT_USX 1 #define VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE 2 +#define VEND1_GLOBAL_CFG_MACSEC_ENABLE BIT(9) /* Vendor specific 1, MDIO_MMD_VEND2 */ #define VEND1_GLOBAL_CONTROL2 0xc001 diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c index 77a48635d7bf..72329e328f27 100644 --- a/drivers/net/phy/aquantia/aquantia_main.c +++ b/drivers/net/phy/aquantia/aquantia_main.c @@ -987,6 +987,15 @@ static const u16 aqr_global_cfg_regs[] = { VEND1_GLOBAL_CFG_10G }; +static const int aqr_global_cfg_speeds[] = { + SPEED_10, + SPEED_100, + SPEED_1000, + SPEED_2500, + SPEED_5000, + SPEED_10000, +}; + static int aqr107_fill_interface_modes(struct phy_device *phydev) { unsigned long *possible = phydev->possible_interfaces; @@ -1007,6 +1016,15 @@ static int aqr107_fill_interface_modes(struct phy_device *phydev) serdes_mode = FIELD_GET(VEND1_GLOBAL_CFG_SERDES_MODE, val); rate_adapt = FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val); + phydev_info(phydev, "Speed %d SerDes mode %d autoneg %d training %d reset on transition %d silence %d rate adapt %d macsec %d\n", + aqr_global_cfg_speeds[i], serdes_mode, + !!(val & VEND1_GLOBAL_CFG_AUTONEG_ENA), + !!(val & VEND1_GLOBAL_CFG_TRAINING_ENA), + !!(val & VEND1_GLOBAL_CFG_RESET_ON_TRANSITION), + !!(val & VEND1_GLOBAL_CFG_SERDES_SILENCE), + rate_adapt, + !!(val & VEND1_GLOBAL_CFG_MACSEC_ENABLE)); + switch (serdes_mode) { case VEND1_GLOBAL_CFG_SERDES_MODE_XFI: if (rate_adapt == VEND1_GLOBAL_CFG_RATE_ADAPT_USX) -- 2.43.0