linux-kernel - [PATCH RFC 5/5] arm64: dts: marvell: pxa1908: Add power controller

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Message-Id: <20250806-pxa1908-genpd-v1-5-16409309fc72@dujemihanovic.xyz>
Date: Wed, 06 Aug 2025 19:33:24 +0200
From: Duje Mihanović <duje@...emihanovic.xyz>
To: Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Ulf Hansson <ulf.hansson@...aro.org>
Cc: David Wronek <david@...nlining.org>, Karel Balej <balejk@...fyz.cz>, 
 phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht, 
 linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-pm@...r.kernel.org, 
 Duje Mihanović <duje@...emihanovic.xyz>
Subject: [PATCH RFC 5/5] arm64: dts: marvell: pxa1908: Add power controller

Add a node for the newly implemented power domain controller. Also add
the first two power domain consumers: IOMMU (fixes probing) and
framebuffer.

Signed-off-by: Duje Mihanović <duje@...emihanovic.xyz>
---
 .../marvell/mmp/pxa1908-samsung-coreprimevelte.dts |  1 +
 arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi       | 36 +++++++++++++++++++++-
 2 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 47a4f01a7077bfafe2cc50d0e59c37685ec9c2e9..2f175ae48c6a2371c407b3a6ffd3cdd577f44e56 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -23,6 +23,7 @@ chosen {
 		fb0: framebuffer@...77000 {
 			compatible = "simple-framebuffer";
 			reg = <0 0x17177000 0 (480 * 800 * 4)>;
+			power-domains = <&pd PXA1908_POWER_DOMAIN_DSI>;
 			width = <480>;
 			height = <800>;
 			stride = <(480 * 4)>;
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index cf2b9109688ce560eec8a1397251ead68d78a239..630e99f2c309dca0872d824a098ac93b6e55c3a4 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -3,6 +3,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/marvell,pxa1908.h>
+#include <dt-bindings/power/marvell,pxa1908-power.h>
 
 / {
 	model = "Marvell Armada PXA1908";
@@ -79,6 +80,7 @@ smmu: iommu@...10000 {
 			#iommu-cells = <1>;
 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&pd PXA1908_POWER_DOMAIN_VPU>;
 			status = "disabled";
 		};
 
@@ -291,9 +293,41 @@ sdh2: mmc@...00 {
 			};
 
 			apmu: clock-controller@...00 {
-				compatible = "marvell,pxa1908-apmu";
+				compatible = "marvell,pxa1908-apmu", "simple-mfd", "syscon";
 				reg = <0x82800 0x400>;
 				#clock-cells = <1>;
+
+				pd: power-controller {
+					compatible = "marvell,pxa1908-power-controller";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					#power-domain-cells = <1>;
+
+					power-domain@...1908_POWER_DOMAIN_VPU {
+						reg = <PXA1908_POWER_DOMAIN_VPU>;
+						#power-domain-cells = <0>;
+					};
+
+					power-domain@...1908_POWER_DOMAIN_GPU {
+						reg = <PXA1908_POWER_DOMAIN_GPU>;
+						#power-domain-cells = <0>;
+					};
+
+					power-domain@...1908_POWER_DOMAIN_GPU2D {
+						reg = <PXA1908_POWER_DOMAIN_GPU2D>;
+						#power-domain-cells = <0>;
+					};
+
+					power-domain@...1908_POWER_DOMAIN_DSI {
+						reg = <PXA1908_POWER_DOMAIN_DSI>;
+						#power-domain-cells = <0>;
+					};
+
+					power-domain@...1908_POWER_DOMAIN_ISP {
+						reg = <PXA1908_POWER_DOMAIN_ISP>;
+						#power-domain-cells = <0>;
+					};
+				};
 			};
 		};
 	};

-- 
2.50.1