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Message-ID: <aJOUA36kOYklPzXt@google.com>
Date: Wed, 6 Aug 2025 10:42:27 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Xin Li <xin@...or.com>, Dapeng Mi <dapeng1.mi@...ux.intel.com>, 
	Sandipan Das <sandipan.das@....com>
Subject: Re: [PATCH 05/18] KVM: x86: Unconditionally handle
 MSR_IA32_TSC_DEADLINE in fastpath exits

On Tue, Aug 05, 2025, Sean Christopherson wrote:
> Stating the obvious, this allows handling MSR_IA32_TSC_DEADLINE writes in
> the fastpath on AMD CPUs.

Got around to measuring this via the KUT vmexit "tscdeadline_immed" test.  Without
the mediated PMU, the gains are very modest: ~2550 => ~2400 cycles.  But with the
mediated PMU and its heavy context switch, the gains are ~6100 => ~2400 cycles.

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