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Message-ID: <867bzg9uwk.wl-maz@kernel.org>
Date: Wed, 06 Aug 2025 19:17:47 +0100
From: Marc Zyngier <maz@...nel.org>
To: Oliver Upton <oliver.upton@...ux.dev>
Cc: Volodymyr Babchuk <Volodymyr_Babchuk@...m.com>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
"kvmarm@...ts.linux.dev" <kvmarm@...ts.linux.dev>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Joey Gouly <joey.gouly@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Zenghui Yu <yuzenghui@...wei.com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>
Subject: Re: [PATCH v1 1/2] KVM: arm64: nv: fix S2 translation for nVHE guests
On Wed, 06 Aug 2025 18:37:34 +0100,
Oliver Upton <oliver.upton@...ux.dev> wrote:
>
> Hi Volodymyr,
>
> Thanks for catching this.
>
> On Wed, Aug 06, 2025 at 02:17:55PM +0000, Volodymyr Babchuk wrote:
> > According to ARM architecture specification (ARM DDI 0487 L.a, section
> > C5.4.3), Stage 2 translation should be skipped when VHE is active, or,
> > in other words, E2H bit is set. Fix the code by inverting both check
> > and comment.
> >
> > Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@...m.com>
> > ---
> > arch/arm64/kvm/at.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c
> > index a25be111cd8f8..5e7c3fb01273c 100644
> > --- a/arch/arm64/kvm/at.c
> > +++ b/arch/arm64/kvm/at.c
> > @@ -1412,10 +1412,10 @@ void __kvm_at_s12(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)
> > return;
> >
> > /*
> > - * If we only have a single stage of translation (E2H=0 or
> > + * If we only have a single stage of translation (E2H=1 or
> > * TGE=1), exit early. Same thing if {VM,DC}=={0,0}.
> > */
> > - if (!vcpu_el2_e2h_is_set(vcpu) || vcpu_el2_tge_is_set(vcpu) ||
> > + if (vcpu_el2_e2h_is_set(vcpu) || vcpu_el2_tge_is_set(vcpu) ||
>
> The check should be HCR_EL2.<E2H,TGE> == '11'. Maybe instead:
>
> /*
> * Exit early if we only have a single stage of translation
> * either because we're in the EL2&0 translation regime or
> * stage-2 translation is disabled (i.e. HCR_EL2.{VM,DC}=={0,0}).
> */
> if (compute_translation_regime(vcpu, op) == TR_EL20 ||
> !(vcpu_read_sys_reg(vcpu, HCR_EL2) & (HCR_VM | HCR_DC)))
> return;
Ah, same solution, just way better written!
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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