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Message-ID: <87ldnwfb1g.fsf@epam.com>
Date: Wed, 6 Aug 2025 20:30:20 +0000
From: Volodymyr Babchuk <Volodymyr_Babchuk@...m.com>
To: Oliver Upton <oliver.upton@...ux.dev>
CC: "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "kvmarm@...ts.linux.dev"
	<kvmarm@...ts.linux.dev>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, Marc Zyngier <maz@...nel.org>, Joey Gouly
	<joey.gouly@....com>, Suzuki K Poulose <suzuki.poulose@....com>, Zenghui Yu
	<yuzenghui@...wei.com>, Catalin Marinas <catalin.marinas@....com>, Will
 Deacon <will@...nel.org>
Subject: Re: [PATCH v1 2/2] KVM: arm64: nv: update CPU register PAR_EL1 after
 'at s*'


Hi Oliver,

Oliver Upton <oliver.upton@...ux.dev> writes:

> On Wed, Aug 06, 2025 at 02:17:55PM +0000, Volodymyr Babchuk wrote:
>> Previously this code update only vCPU's in-memory value, which is good,
>> but not enough, as there will be no context switch after exiting
>> exception handler, so in-memory value will not get into actual
>> register.
>> 
>> It worked good enough for VHE guests because KVM code tried fast path,
>> which of course updated real PAR_EL1.
>> 
>> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@...m.com>
>> ---
>>  arch/arm64/kvm/sys_regs.c | 6 ++++++
>>  1 file changed, 6 insertions(+)
>> 
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 7b8a0a6f26468..ab2b5e261d312 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -3463,6 +3463,9 @@ static bool handle_at_s1e2(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
>>  
>>  	__kvm_at_s1e2(vcpu, op, p->regval);
>>  
>> +	/* No context switch happened, so we need to update PAR_EL1 manually */
>> +	write_sysreg(vcpu_read_sys_reg(vcpu, PAR_EL1), par_el1);
>> +
>
> Ok, this had me thoroughly confused for a moment. The bug is actually in
> kvm_write_sys_reg() which is supposed to update the sysreg value when
> things are loaded on the CPU. __kvm_at_s1e2() is doing the right thing
> by calling this accessor.
>
> For registers like PAR_EL1 that don't have an EL2->EL1 mapping we assume
> they belong to the EL1 context and thus are in-memory when in a hyp
> context. TPIDR(RO)_EL0 is similarly affected.
>
> This is a bit of an ugly hack, but something like the following should
> get things working if you're able to test it:

Yep, it is working pretty good. Will you send the patch? I'll add my
Tested-by.

Or will you prefer that I'll send the patch with your Suggested-by: ?

[...]

-- 
WBR, Volodymyr

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