linux-kernel - Re: [PATCH v5 1/2] dt-bindings: timer: mti,gcru

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Message-ID: <98bda141-9fd7-40b8-b5f9-5e83e333da93@htecgroup.com>
Date: Wed, 6 Aug 2025 12:35:04 +0000
From: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
To: "krzk@...nel.org" <krzk@...nel.org>
CC: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>, "alex@...ti.fr"
	<alex@...ti.fr>, "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "conor.dooley@...rochip.com"
	<conor.dooley@...rochip.com>, "daniel.lezcano@...aro.org"
	<daniel.lezcano@...aro.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, Djordje Todorovic
	<Djordje.Todorovic@...cgroup.com>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
	"palmer@...belt.com" <palmer@...belt.com>, "paul.walmsley@...ive.com"
	<paul.walmsley@...ive.com>, "robh@...nel.org" <robh@...nel.org>,
	"tglx@...utronix.de" <tglx@...utronix.de>
Subject: Re: [PATCH v5 1/2] dt-bindings: timer: mti,gcru

On 7/14/25 09:24, Krzysztof Kozlowski wrote:

> On Fri, Jul 11, 2025 at 11:56:45PM +0200, Aleksa Paunovic wrote:
>> +$id: http://devicetree.org/schemas/timer/mti,gcru.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: GCR.U timer device for RISC-V platforms
>> +
>> +maintainers:
>> +  - Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
>> +
>> +description:
>> +  The GCR.U memory region contains memory mapped shadow copies of
>> +  mtime and hrtime Global Configuration Registers,
>> +  which software can choose to make accessible from user mode.
>> +
>> +properties:
>> +  compatible:
>> +    const: mti,gcru
> Is this architecture? vendor prefix suggests not. So is this for SoC?
> Then why there are no SoC compatibles here instead?
Hi Krzysztof,

Thank you for your comment.
You are right, this is for the MIPS P8700 SoC. Will fix this in v6.


Best regards,

Aleksa

>
> Best regards,
> Krzysztof