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Message-Id: <20250806133824.525871-2-rick.wertenbroek@gmail.com>
Date: Wed, 6 Aug 2025 15:38:21 +0200
From: Rick Wertenbroek <rick.wertenbroek@...il.com>
To:
Cc: rick.wertenbroek@...g-vd.ch,
dlemoal@...nel.org,
alberto.dassatti@...g-vd.ch,
Rick Wertenbroek <rick.wertenbroek@...il.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 1/3] dt-bindings: phy: rockchip,pcie3-phy: add optional differential phy clocks
Both PHYs can use an alternate reference differential clock, add the clocks
to the DT bindings
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@...il.com>
---
.../devicetree/bindings/phy/rockchip,pcie3-phy.yaml | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
index d7de8b527c5c..b747930b18f1 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
@@ -20,11 +20,11 @@ properties:
clocks:
minItems: 1
- maxItems: 3
+ maxItems: 5
clock-names:
minItems: 1
- maxItems: 3
+ maxItems: 5
data-lanes:
description: which lanes (by position) should be mapped to which
@@ -82,10 +82,15 @@ allOf:
then:
properties:
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 5
clock-names:
items:
- const: pclk
+ - const: phy0_ref_alt_p
+ - const: phy0_ref_alt_m
+ - const: phy1_ref_alt_p
+ - const: phy1_ref_alt_m
else:
properties:
clocks:
--
2.25.1
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