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Message-ID: <65645f94-3a61-47fa-ad13-9daaf89e926c@lunn.ch>
Date: Wed, 6 Aug 2025 17:47:06 +0200
From: Andrew Lunn <andrew@...n.ch>
To: MD Danish Anwar <danishanwar@...com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Meghana Malladi <m-malladi@...com>,
	Himanshu Mittal <h-mittal1@...com>,
	linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, srk@...com,
	Vignesh Raghavendra <vigneshr@...com>,
	Roger Quadros <rogerq@...nel.org>
Subject: Re: [PATCH net v3] net: ti: icssg-prueth: Fix emac link speed
 handling

On Tue, Aug 05, 2025 at 11:08:12PM +0530, MD Danish Anwar wrote:
> When link settings are changed emac->speed is populated by
> emac_adjust_link(). The link speed and other settings are then written into
> the DRAM. However if both ports are brought down after this and brought up
> again or if the operating mode is changed and a firmware reload is needed,
> the DRAM is cleared by icssg_config(). As a result the link settings are
> lost.
> 
> Fix this by calling emac_adjust_link() after icssg_config(). This re
> populates the settings in the DRAM after a new firmware load.
> 
> Fixes: 9facce84f406 ("net: ti: icssg-prueth: Fix firmware load sequence.")
> Signed-off-by: MD Danish Anwar <danishanwar@...com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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