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Message-ID: <nowqjgxmomniw624avrizohwzzq7ebkznb64m25qim3zgxjacn@oizd7ngxjd6a>
Date: Fri, 8 Aug 2025 06:01:39 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Nam Cao <namcao@...utronix.de>, Inochi Amaoto <inochiama@...il.com>, 
	Thomas Gleixner <tglx@...utronix.de>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Samuel Holland <samuel.holland@...ive.com>
Cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	Yixun Lan <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH] irqchip/sifive-plic: Respect mask state when setting
 affinity

On Thu, Aug 07, 2025 at 02:39:42PM +0200, Nam Cao wrote:
> Inochi Amaoto <inochiama@...il.com> writes:
> 
> > The plic_set_affinity always call plic_irq_enable(), which clears up
> > the priority setting even the irq is only masked. This make the irq
> > unmasked unexpectly.
> >
> > Replace the plic_irq_enable/disable() with plic_irq_toggle() to
> > avoid changing priority setting.
> >
> > Suggested-by: Thomas Gleixner <tglx@...utronix.de>
> > Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> > ---
> >  drivers/irqchip/irq-sifive-plic.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> > index bf69a4802b71..5bf5050996da 100644
> > --- a/drivers/irqchip/irq-sifive-plic.c
> > +++ b/drivers/irqchip/irq-sifive-plic.c
> > @@ -148,6 +148,7 @@ static void plic_irq_enable(struct irq_data *d)
> >  
> >  static void plic_irq_disable(struct irq_data *d)
> >  {
> > +	plic_irq_mask(d);
> >  	plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 0);
> >  }
> 
> This part is not required for the problem you are addressing, right?
> 
> I do not oppose the change, I'm just curious if I miss something here.
> 

It is true, this is added because it is needed to follow
the disable required of the irqchip. I think it is better
to split to a separate one.

> >  
> > @@ -179,12 +180,14 @@ static int plic_set_affinity(struct irq_data *d,
> >  	if (cpu >= nr_cpu_ids)
> >  		return -EINVAL;
> >  
> > -	plic_irq_disable(d);
> > +	/* Invalidate the original routing entry */
> > +	plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 0);
> >  
> >  	irq_data_update_effective_affinity(d, cpumask_of(cpu));
> >  
> > +	/* Setting the new routing entry if irq is enabled */
> >  	if (!irqd_irq_disabled(d))
> > -		plic_irq_enable(d);
> > +		plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 1);
> >  
> >  	return IRQ_SET_MASK_OK_DONE;
> >  }
> 
> This part makes sense:
> 
> Reviewed-by: Nam Cao <namcao@...utronix.de>
> Tested-by: Nam Cao <namcao@...utronix.de> # VisionFive 2

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