[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250807-stm32mp15-m_can-add-reset-v2-2-f69ebbfced1f@pengutronix.de>
Date: Thu, 07 Aug 2025 08:09:31 +0200
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Chandrasekar Ramakrishnan <rcsekar@...sung.com>,
Vincent Mailhol <mailhol.vincent@...adoo.fr>
Cc: devicetree@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...gutronix.de, linux-can@...r.kernel.org,
Marc Kleine-Budde <mkl@...gutronix.de>
Subject: [PATCH v2 2/2] ARM: dts: stm32: add resets property to m_can nodes
in the stm32mp153
On the STM32MP153 the m_cam IP cores (a.k.a. FDCAN) have an external
shared reset in the RCC. Add the reset to both m_can nodes.
Signed-off-by: Marc Kleine-Budde <mkl@...gutronix.de>
---
arch/arm/boot/dts/st/stm32mp153.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp153.dtsi b/arch/arm/boot/dts/st/stm32mp153.dtsi
index 4640dafb1598..92794b942ab2 100644
--- a/arch/arm/boot/dts/st/stm32mp153.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp153.dtsi
@@ -40,6 +40,7 @@ m_can1: can@...0e000 {
interrupt-names = "int0", "int1";
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
+ resets = <&rcc FDCAN_R>;
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
access-controllers = <&etzpc 62>;
status = "disabled";
@@ -54,6 +55,7 @@ m_can2: can@...0f000 {
interrupt-names = "int0", "int1";
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
clock-names = "hclk", "cclk";
+ resets = <&rcc FDCAN_R>;
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
access-controllers = <&etzpc 62>;
status = "disabled";
--
2.47.2
Powered by blists - more mailing lists