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Message-ID: <CAMuHMdXjWaAU=E8g1uQf95eYUPyVnOnxJKK=u4tj+rpTNO+0oA@mail.gmail.com>
Date: Thu, 7 Aug 2025 08:59:19 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Linus Walleij <linus.walleij@...aro.org>, linux-renesas-soc@...r.kernel.org, 
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 1/7] pinctrl: renesas: rzg2l: Fix invalid unsigned
 return in rzg3s_oen_read()

On Wed, 6 Aug 2025 at 21:56, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> rzg3s_oen_read() returns a u32 value, but previously propagated a negative
> error code from rzg3s_pin_to_oen_bit(), resulting in an unintended large
> positive value due to unsigned conversion. This caused incorrect
> output-enable reporting for certain pins.
>
> Without this patch, pins P1_0-P1_4 and P7_0-P7_4 are incorrectly reported
> as "output enabled" in the pinconf-pins debugfs file. With this fix, only
> P1_0-P1_1 and P7_0-P7_1 are shown as "output enabled", which matches the
> hardware manual.
>
> Fix this by returning 0 when the OEN bit lookup fails, treating the pin
> as output-disabled by default.
>
> Fixes: a9024a323af2 ("pinctrl: renesas: rzg2l: Clean up and refactor OEN read/write functions")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
> v2->v3:
> - Added Reviewed-by tag from Geert.

Thanks, but v2 is already queued.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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