linux-kernel - Re: [PATCH 1/4] dt-bindings: hwinfo: Add second register range for GP

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Message-ID: <736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org>
Date: Thu, 7 Aug 2025 10:22:19 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Judith Mendez <jm@...com>, Nishanth Menon <nm@...com>,
 Tero Kristo <kristo@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Adrian Hunter <adrian.hunter@...el.com>,
 Ulf Hansson <ulf.hansson@...aro.org>
Cc: Vignesh Raghavendra <vigneshr@...com>,
 Santosh Shilimkar <ssantosh@...nel.org>,
 linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: hwinfo: Add second register range for
 GP_SW

On 06/08/2025 17:24, Judith Mendez wrote:
> Hi Krystoff,

That's not really my name. I know it is tricky to type, so it's enough
to say Hi.

>>>   
>>>     reg:
>>> -    maxItems: 1
>>> +    maxItems: 2
>>> +    minItems: 1
>>
>> They always come with reversed order... but anyway, you instead must
>> list the items with minItems.
>>
>> another problem is that this is not supposed to be per register. I
>> already complained more than once about some of TI bindings: stop
>> creating device nodes or address spaces per register.
>>
>> That's one address space.
> 
> That does not really make sense. Registers jtag vs gp_sw have a
> different back-end, one from silicon and another from efuse. Not even

How does the datasheet describe this address space(s) (not registers,
address space)?

> sure if the memory map will always be the same across processors.
> 
>>
Best regards,
Krzysztof