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Message-ID: <202508071629474197f5yUjdjCHVE_fhh--5_c@zte.com.cn>
Date: Thu, 7 Aug 2025 16:29:47 +0800 (CST)
From: <zhou.lu1@....com.cn>
To: <mason@...nel.org>
Cc: <linux-kernel@...r.kernel.org>
Subject: [PATCH] Make schbench work for riscv64
From: zhoulu <zhou.lu1@....com.cn>
Add nop macro for riscv64
Signed-off-by: zhoulu <zhou.lu1@....com.cn>
---
schbench.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/schbench.c b/schbench.c
index acdb172..c8f9e56 100644
--- a/schbench.c
+++ b/schbench.c
@@ -1134,6 +1134,8 @@ unsigned long long read_sched_delay(pid_t tid)
#define nop __asm__ __volatile__("yield" ::: "memory")
#elif defined(__powerpc64__)
#define nop __asm__ __volatile__("nop": : :"memory")
+#elif defined(__riscv)
+#define nop __asm__ __volatile__("nop": : :"memory")
#else
#error Unsupported architecture
#endif
--
2.27.0
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