linux-kernel - Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

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Message-ID: <pxes6n4nja4v2yfrr335b6ynggwbz3n6t5cgjx26462thefr64@po4bdjwp43h3>
Date: Thu, 7 Aug 2025 14:03:53 +0530
From: "mani@...nel.org" <mani@...nel.org>
To: Hongxing Zhu <hongxing.zhu@....com>
Cc: Hans Zhang <hans.zhang@...tech.com>, Frank Li <frank.li@....com>, 
	"Z.Q. Hou" <zhiqiang.hou@....com>, "bhelgaas@...gle.com" <bhelgaas@...gle.com>, 
	"ilpo.jarvinen@...ux.intel.com" <ilpo.jarvinen@...ux.intel.com>, "Jonthan.Cameron@...wei.com" <Jonthan.Cameron@...wei.com>, 
	"lukas@...ner.de" <lukas@...ner.de>, "feng.tang@...ux.alibaba.com" <feng.tang@...ux.alibaba.com>, 
	"jingoohan1@...il.com" <jingoohan1@...il.com>, "lpieralisi@...nel.org" <lpieralisi@...nel.org>, 
	"kwilczynski@...nel.org" <kwilczynski@...nel.org>, "robh@...nel.org" <robh@...nel.org>, 
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"imx@...ts.linux.dev" <imx@...ts.linux.dev>
Subject: Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

On Thu, Aug 07, 2025 at 07:38:06AM GMT, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Hans Zhang <hans.zhang@...tech.com>
> > Sent: 2025年8月7日 15:21
> > To: Hongxing Zhu <hongxing.zhu@....com>; Frank Li <frank.li@....com>;
> > Z.Q. Hou <zhiqiang.hou@....com>; bhelgaas@...gle.com;
> > ilpo.jarvinen@...ux.intel.com; Jonthan.Cameron@...wei.com;
> > lukas@...ner.de; feng.tang@...ux.alibaba.com; jingoohan1@...il.com;
> > mani@...nel.org; lpieralisi@...nel.org; kwilczynski@...nel.org;
> > robh@...nel.org
> > Cc: linux-pci@...r.kernel.org; linux-kernel@...r.kernel.org;
> > imx@...ts.linux.dev
> > Subject: Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters
> > 
> > 
> > 
> > On 2025/8/7 15:09, Richard Zhu wrote:
> > > EXTERNAL EMAIL
> > >
> > > Some PCI host bridges have limitation that AER/PME can't work over MSI.
> > > Vendors route the AER/PME via the dedicated SPI interrupter which is
> > > only handled by the controller driver.
> > >
> > > Because that aer and pme had been defined in the snps,dw-pcie.yaml
> > > document. Fetch the vendor specific AER/PME interrupters if they are
> > > defined in the fdt file by generic bridge->get_service_irqs hook.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > ---
> > >   .../pci/controller/dwc/pcie-designware-host.c | 32
> > +++++++++++++++++++
> > >   1 file changed, 32 insertions(+)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 906277f9ffaf7..9393dc99df81f 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -13,11 +13,13 @@
> > >   #include <linux/irqdomain.h>
> > >   #include <linux/msi.h>
> > >   #include <linux/of_address.h>
> > > +#include <linux/of_irq.h>
> > >   #include <linux/of_pci.h>
> > >   #include <linux/pci_regs.h>
> > >   #include <linux/platform_device.h>
> > >
> > >   #include "../../pci.h"
> > > +#include "../../pcie/portdrv.h"
> > >   #include "pcie-designware.h"
> > >
> > >   static struct pci_ops dw_pcie_ops;
> > > @@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct
> > dw_pcie_rp *pp)
> > >          return 0;
> > >   }
> > >
> > > +static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
> > > +                                   int *irqs, int mask) {
> > > +       struct device *dev = bridge->dev.parent;
> > > +       struct device_node *np = dev->of_node;
> > > +       int ret, count = 0;
> > > +
> > > +       if (!np)
> > > +               return 0;
> > > +
> > > +       if (mask & PCIE_PORT_SERVICE_AER) {
> > > +               ret = of_irq_get_byname(np, "aer");
> > > +               if (ret > 0) {
> > > +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
> > > +                       count++;
> > > +               }
> > > +       }
> > > +
> > > +       if (mask & PCIE_PORT_SERVICE_PME) {
> > > +               ret = of_irq_get_byname(np, "pme");
> > > +               if (ret > 0) {
> > > +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
> > > +                       count++;
> > > +               }
> > > +       }
> > > +
> > 
> > Hi Richard,
> > 
> > As far as I know, some SoCs directly use the misc SPI interrupt derived from
> > Synopsys PCIe IP. This includes PME, AER and other interrupts. So here, can
> > we assign the interrupt number ourselves?
> >
> [Richard Zhu] Yes, they can be assigned by vendor themselves. The
>  different PME, AER or other interrupts can be defined in the chip
>  specific dts files.
> > Also, whether to trigger the AER/PME interrupt in a similar way.
> > (generic_handle_domain_irq)
> [Richard Zhu] This patch-set is just fetch the dedicated AER/PME
> interrupt for portdrv in none MSI/MSI-x/INTx mode. The trigger of
>  AER/PME would be handled in portdrv.
> > Because there may be a misc SPI interrupt that requires a clear related state,
> > what is referred to here is not the AER/PME state.
> [Richard Zhu]How about to do the other misc SPI interrupts related state
>  clear in vendor local driver?
> 

I'd expect the controller drivers to call the relevant part of the AER/PME
handlers from their own platform IRQ handler. This will work for platforms using
the shared IRQ line, and platforms requiring clearing custom bits in their own
register space before handling the interrupts.

- Mani

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