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Message-ID: <20250809135137.259427-1-thomas.hellstrom@linux.intel.com>
Date: Sat, 9 Aug 2025 15:51:31 +0200
From: Thomas Hellström <thomas.hellstrom@...ux.intel.com>
To: intel-xe@...ts.freedesktop.org
Cc: Thomas Hellström <thomas.hellstrom@...ux.intel.com>,
Matthew Brost <matthew.brost@...el.com>,
Jason Gunthorpe <jgg@...pe.ca>,
Andrew Morton <akpm@...ux-foundation.org>,
Simona Vetter <simona.vetter@...ll.ch>,
Dave Airlie <airlied@...il.com>,
dri-devel@...ts.freedesktop.org,
linux-mm@...ck.org,
linux-kernel@...r.kernel.org,
Christian König <christian.koenig@....com>
Subject: [RFC PATCH 0/6] Multi-pass MMU interval notifiers
GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.
With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete on all GPUs.
One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for multi-pass in the core appears like the right choice.
So this series does that, with pach 1 implementing the core support
and also describes the choices made.
The rest of the patches implements a POC with drm_gpusvm, but this
will also come in handy for things like userptr where waiting for
bind completion, starting of preemption and waiting for
preemption completion can pe pipelined across GPUs.
Any feedback or suggestions for alternative approches appreciated.
Cc: Matthew Brost <matthew.brost@...el.com>
Cc: Jason Gunthorpe <jgg@...pe.ca>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Simona Vetter <simona.vetter@...ll.ch>
Cc: Dave Airlie <airlied@...il.com>
Cc: <dri-devel@...ts.freedesktop.org>
Cc: <linux-mm@...ck.org>
Cc: <linux-kernel@...r.kernel.org>
Matthew Brost (5):
drm/gpusvm: Update GPU SVM / Xe to twopass MMU notifier
drm/gpusvm: Add drm_gpusvm_in_notifier_* helpers
drm/xe: Skip waiting on unarmed fences in
xe_gt_tlb_invalidation_fence_wait
drm/xe: Add fences argument to xe_vm_range_tilemask_tlb_invalidation
drm/xe: Implement two pass MMU notifiers for SVM
Thomas Hellström (1):
mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes
drivers/gpu/drm/drm_gpusvm.c | 18 +++--
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 3 +-
drivers/gpu/drm/xe/xe_svm.c | 84 +++++++++++++++++----
drivers/gpu/drm/xe/xe_vm.c | 26 ++++---
drivers/gpu/drm/xe/xe_vm.h | 6 +-
include/drm/drm_gpusvm.h | 33 ++++++--
include/linux/mmu_notifier.h | 30 ++++++++
mm/mmu_notifier.c | 67 +++++++++++++---
8 files changed, 217 insertions(+), 50 deletions(-)
--
2.50.1
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