linux-kernel - [PATCH v2 7/7] ARM: dts: rockchip: Add vdec node for RK3288

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Message-ID: <20250810212454.3237486-8-jonas@kwiboo.se>
Date: Sun, 10 Aug 2025 21:24:37 +0000
From: Jonas Karlman <jonas@...boo.se>
To: Ezequiel Garcia <ezequiel@...guardiasur.com.ar>,
	Detlev Casanova <detlev.casanova@...labora.com>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heiko Stuebner <heiko@...ech.de>
Cc: Alex Bee <knaerzche@...il.com>,
	Nicolas Dufresne <nicolas.dufresne@...labora.com>,
	Sebastian Fricke <sebastian.fricke@...labora.com>,
	linux-media@...r.kernel.org,
	linux-rockchip@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Jonas Karlman <jonas@...boo.se>
Subject: [PATCH v2 7/7] ARM: dts: rockchip: Add vdec node for RK3288

From: Alex Bee <knaerzche@...il.com>

RK3288 contains a Rockchip VDEC block that only support HEVC
decoding. Add a vdec node for this.

Signed-off-by: Alex Bee <knaerzche@...il.com>
Signed-off-by: Jonas Karlman <jonas@...boo.se>
---
Changes in v2:
- No change
---
 arch/arm/boot/dts/rockchip/rk3288.dtsi | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 42d705b544ec..eab0c9a2d482 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1293,6 +1293,21 @@ vpu_mmu: iommu@...a0800 {
 		power-domains = <&power RK3288_PD_VIDEO>;
 	};
 
+	hevc: video-codec@...c0000 {
+		compatible = "rockchip,rk3288-vdec";
+		reg = <0x0 0xff9c0000 0x0 0x440>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+			 <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+		clock-names = "axi", "ahb", "cabac", "core";
+		assigned-clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+				  <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+		assigned-clock-rates = <400000000>, <100000000>,
+				       <300000000>, <300000000>;
+		iommus = <&hevc_mmu>;
+		power-domains = <&power RK3288_PD_HEVC>;
+	};
+
 	hevc_mmu: iommu@...c0440 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
@@ -1300,7 +1315,7 @@ hevc_mmu: iommu@...c0440 {
 		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
-		status = "disabled";
+		power-domains = <&power RK3288_PD_HEVC>;
 	};
 
 	gpu: gpu@...30000 {
-- 
2.50.1