| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250811-gpio-mmio-pinctrl-conv-v1-5-a84c5da2be20@linaro.org>
Date: Mon, 11 Aug 2025 17:02:04 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Clément Le Goffic <legoffic.clement@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Bartosz Golaszewski <brgl@...ev.pl>, Avi Fishman <avifishman70@...il.com>,
Tomer Maimon <tmaimon77@...il.com>, Tali Perry <tali.perry1@...il.com>,
Patrick Venture <venture@...gle.com>, Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Jonathan Neuschäfer <j.neuschaefer@....net>
Cc: linux-gpio@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: [PATCH 5/5] pinctrl: wpcm450: use new generic GPIO chip API
From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
---
drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 44 ++++++++++++++++++++-----------
1 file changed, 28 insertions(+), 16 deletions(-)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
index 8d8314ba0e4cb55db2b1d3adf2de07e6fb93c279..4dd8a3daa83e44b0e2780fedb03ab11fa46a4b7d 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
@@ -11,6 +11,7 @@
#include <linux/device.h>
#include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mfd/syscon.h>
@@ -47,7 +48,7 @@ struct wpcm450_pinctrl;
struct wpcm450_bank;
struct wpcm450_gpio {
- struct gpio_chip gc;
+ struct gpio_generic_chip chip;
struct wpcm450_pinctrl *pctrl;
const struct wpcm450_bank *bank;
};
@@ -184,11 +185,12 @@ static void wpcm450_gpio_irq_unmask(struct irq_data *d)
}
/*
- * This is an implementation of the gpio_chip->get() function, for use in
- * wpcm450_gpio_fix_evpol. Unfortunately, we can't use the bgpio-provided
- * implementation there, because it would require taking gpio_chip->bgpio_lock,
- * which is a spin lock, but wpcm450_gpio_fix_evpol must work in contexts where
- * a raw spin lock is held.
+ * FIXME: This is an implementation of the gpio_chip->get() function, for use
+ * in wpcm450_gpio_fix_evpol(). It was implemented back when gpio-mmio used a
+ * regular spinlock internally, while wpcm450_gpio_fix_evpol() needed to work
+ * in contexts with a raw spinlock held. Since then, the gpio generic chip has
+ * been switched to using a raw spinlock so this should be converted to using
+ * the locking interfaces provided in linux/gpio/gneneric.h.
*/
static int wpcm450_gpio_get(struct wpcm450_gpio *gpio, int offset)
{
@@ -329,7 +331,7 @@ static void wpcm450_gpio_irqhandler(struct irq_desc *desc)
for_each_set_bit(bit, &pending, 32) {
int offset = wpcm450_irq_bitnum_to_gpio(gpio, bit);
- generic_handle_domain_irq(gpio->gc.irq.domain, offset);
+ generic_handle_domain_irq(gpio->chip.gc.irq.domain, offset);
}
chained_irq_exit(chip, desc);
}
@@ -1012,7 +1014,7 @@ static int wpcm450_gpio_add_pin_ranges(struct gpio_chip *chip)
struct wpcm450_gpio *gpio = gpiochip_get_data(chip);
const struct wpcm450_bank *bank = gpio->bank;
- return gpiochip_add_pin_range(&gpio->gc, dev_name(gpio->pctrl->dev),
+ return gpiochip_add_pin_range(&gpio->chip.gc, dev_name(gpio->pctrl->dev),
0, bank->base, bank->length);
}
@@ -1029,6 +1031,7 @@ static int wpcm450_gpio_register(struct platform_device *pdev,
"Resource fail for GPIO controller\n");
for_each_gpiochip_node(dev, child) {
+ struct gpio_generic_chip_config config;
void __iomem *dat = NULL;
void __iomem *set = NULL;
void __iomem *dirout = NULL;
@@ -1060,17 +1063,26 @@ static int wpcm450_gpio_register(struct platform_device *pdev,
} else {
flags = BGPIOF_NO_OUTPUT;
}
- ret = bgpio_init(&gpio->gc, dev, 4,
- dat, set, NULL, dirout, NULL, flags);
+
+ config = (typeof(config)){
+ .dev = dev,
+ .sz = 4,
+ .dat = dat,
+ .set = set,
+ .dirout = dirout,
+ .flags = flags,
+ };
+
+ ret = gpio_generic_chip_init(&gpio->chip, &config);
if (ret < 0)
return dev_err_probe(dev, ret, "GPIO initialization failed\n");
- gpio->gc.ngpio = bank->length;
- gpio->gc.set_config = wpcm450_gpio_set_config;
- gpio->gc.fwnode = child;
- gpio->gc.add_pin_ranges = wpcm450_gpio_add_pin_ranges;
+ gpio->chip.gc.ngpio = bank->length;
+ gpio->chip.gc.set_config = wpcm450_gpio_set_config;
+ gpio->chip.gc.fwnode = child;
+ gpio->chip.gc.add_pin_ranges = wpcm450_gpio_add_pin_ranges;
- girq = &gpio->gc.irq;
+ girq = &gpio->chip.gc.irq;
gpio_irq_chip_set_chip(girq, &wpcm450_gpio_irqchip);
girq->parent_handler = wpcm450_gpio_irqhandler;
girq->parents = devm_kcalloc(dev, WPCM450_NUM_GPIO_IRQS,
@@ -1094,7 +1106,7 @@ static int wpcm450_gpio_register(struct platform_device *pdev,
girq->num_parents++;
}
- ret = devm_gpiochip_add_data(dev, &gpio->gc, gpio);
+ ret = devm_gpiochip_add_data(dev, &gpio->chip.gc, gpio);
if (ret)
return dev_err_probe(dev, ret, "Failed to add GPIO chip\n");
}
--
2.48.1
Powered by blists - more mailing lists