linux-kernel - Re: [PATCH v1] arm64: dts: qcom: ipq5424: add i2c nodes

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Message-ID: <eb344d1e-22af-4ff8-9ddd-316a9968e5d7@quicinc.com>
Date: Mon, 11 Aug 2025 12:50:23 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>,
        <kathiravan.thirumoorthy@....qualcomm.com>
Subject: Re: [PATCH v1] arm64: dts: qcom: ipq5424: add i2c nodes



On 7/30/2025 5:13 PM, Konrad Dybcio wrote:
> On 7/11/25 1:14 PM, Manikanta Mylavarapu wrote:
>> Serial engines 2 and 3 on the IPQ5424 support I2C. The I2C instance
>> operates on serial engine 2, designated as i2c0, and on serial engine 3,
>> designated as i2c1. Add both the i2c0 and i2c1 nodes.
>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
>> ---
>>  arch/arm64/boot/dts/qcom/ipq5424.dtsi | 22 ++++++++++++++++++++++
>>  1 file changed, 22 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>> index 66bd2261eb25..858b9c714a13 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
>> @@ -425,6 +425,28 @@ uart1: serial@...4000 {
>>  				interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
>>  			};
>>  
>> +			i2c0: i2c@...8000 {
>> +				compatible = "qcom,geni-i2c";
>> +				reg = <0 0x01a88000 0 0x4000>;
>> +				clocks = <&gcc GCC_QUPV3_I2C0_CLK>;
>> +				clock-names = "se";
>> +				interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
>> +				assigned-clocks = <&gcc GCC_QUPV3_I2C0_CLK>;
>> +				assigned-clock-rates = <64000000>;
> 
> This is very wrong, the in-driver handling should be enough.
> If not, add an opp-table.
> 

Hi Konrad,

Thank you for your review and valuable feedback.
I will incorporate an opp-table entry with a 64MHz frequency and submit a revised patch.

Thanks & Regards,
Manikanta.