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Message-Id: <20250811021344.3678306-1-maobibo@loongson.cn>
Date: Mon, 11 Aug 2025 10:13:39 +0800
From: Bibo Mao <maobibo@...ngson.cn>
To: Tianrui Zhao <zhaotianrui@...ngson.cn>,
	Huacai Chen <chenhuacai@...nel.org>,
	Xianglai Li <lixianglai@...ngson.cn>
Cc: kvm@...r.kernel.org,
	loongarch@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: [PATCH 0/5] LoongArch: KVM: Support various access size with pch_pic emulation

With PCH PIC interrupt controller emulation driver, its access size is
hardcoded now. Instead the MMIO register can be accessed with different
size such 1/2/4/8.

This patchset adds various read/write size support with emulation
function loongarch_pch_pic_read() and loongarch_pch_pic_write().

Bibo Mao (5):
  LoongArch: KVM: Set version information at initial stage
  LoongArch: KVM: Add read length support in loongarch_pch_pic_read()
  LoongArch: KVM: Add IRR and ISR register read emulation
  LoongArch: KVM: Add different length support in
    loongarch_pch_pic_write()
  LoongArch: KVM: Add address alignment check in pch_pic register access

 arch/loongarch/include/asm/kvm_pch_pic.h |  15 +-
 arch/loongarch/kvm/intc/pch_pic.c        | 239 ++++++++++-------------
 2 files changed, 120 insertions(+), 134 deletions(-)


base-commit: 8f5ae30d69d7543eee0d70083daf4de8fe15d585
-- 
2.39.3


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