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Message-ID: <7798fa0f-4786-42d2-913b-b76af91c94bc@linaro.org>
Date: Tue, 12 Aug 2025 16:39:28 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Krzysztof Kozlowski <krzk@...nel.org>, Bjorn Andersson
<andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Vikash Garodia <quic_vgarodia@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC v2 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
On 12/08/2025 16:26, Konrad Dybcio wrote:
> On 8/12/25 4:24 PM, Krzysztof Kozlowski wrote:
>> On 12/08/2025 16:21, Konrad Dybcio wrote:
>>> On 8/6/25 2:38 PM, Krzysztof Kozlowski wrote:
>>>> Add Iris video codec to SM8750 SoC, which comes with significantly
>>>> different powering up sequence than previous SM8650, thus different
>>>> clocks and resets. For consistency keep existing clock and clock-names
>>>> naming, so the list shares common part.
>>>>
>>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>>>>
>>>> ---
>>>
>>> [...]
>>>
>>>> + iris_opp_table: opp-table {
>>>> + compatible = "operating-points-v2";
>>>> +
>>>> + opp-240000000 {
>>>> + opp-hz = /bits/ 64 <240000000>;
>>>> + required-opps = <&rpmhpd_opp_low_svs_d1>,
>>>> + <&rpmhpd_opp_low_svs_d1>;
>>>> + };
>>>> +
>>>> + opp-338000000 {
>>>> + opp-hz = /bits/ 64 <338000000>;
>>>> + required-opps = <&rpmhpd_opp_low_svs>,
>>>> + <&rpmhpd_opp_low_svs>;
>>>> + };
>>>> +
>>>> + opp-420000000 {
>>>> + opp-hz = /bits/ 64 <420000000>;
>>>> + required-opps = <&rpmhpd_opp_svs>,
>>>> + <&rpmhpd_opp_svs>;
>>>> + };
>>>> +
>>>> + opp-444000000 {
>>>> + opp-hz = /bits/ 64 <444000000>;
>>>> + required-opps = <&rpmhpd_opp_svs_l1>,
>>>> + <&rpmhpd_opp_svs_l1>;
>>>> + };
>>>> +
>>>> + opp-533333334 {
>>>> + opp-hz = /bits/ 64 <533333334>;
>>>> + required-opps = <&rpmhpd_opp_nom>,
>>>> + <&rpmhpd_opp_nom>;
>>>> + };
>>>
>>> There's an additional OPP: 570 MHz @ NOM_L1
>>>
>>> +Dmitry, Vikash, please make sure you're OK with the iommu entries
>>
>>
>> That opp has troubles with clock, so would need some fixed in videocc or
>> iris, AFAIK. Otherwise you will just PM OPP failures. I can add it
>> though, at the end DTS should be independent of drivers. :)
>
> Weird, there's an entry in the frequency table for it (well, * 3 the
> rate) and it comes out of the same PLL as other ones.. what sort of
You mean freq_tbl in P_VIDEO_CC_PLL0_OUT_MAIN? Yeah, I also saw that.
> opp failures do you see?
Only:
[ 9.306006] qcom-iris aa00000.video-codec: dev_pm_opp_set_rate:
failed to find OPP for freq 630000000 (-34)
[ 9.316078] qcom-iris aa00000.video-codec: power on failed
[ 9.322001] qcom-iris aa00000.video-codec: core init failed
Best regards,
Krzysztof
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