[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250812054258.1968351-1-uwu@icenowy.me>
Date: Tue, 12 Aug 2025 13:42:54 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Drew Fustini <fustini@...nel.org>,
Guo Ren <guoren@...nel.org>,
Fu Wei <wefu@...hat.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Michal Wilczynski <m.wilczynski@...sung.com>
Cc: linux-riscv@...ts.infradead.org,
linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org,
Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH 0/4] clk: thead: Misc changes to TH1520 clock driver
This patchset is my changes to the TH1520 clock driver, mainly for
supporting the display controller (the first 3).
The first two are functionality additions, with the first one adding
support for enabling/disabling PLLs (for DPU PLL) and the second one
adding support for changing DPU dividers.
The 3rd one is to address hang issues met when testing the DPU driver
w/o clk_ignore_unused command line option.
The 4th one has no relationship to display, and only exists for my need
to change an arbitrary GPIO (well, GPIO3_3, the one controlling the fan
on Lichee Pi 4A) with gpioset.
This patchset has a dependency (a 0th one) [1].
[1] https://lore.kernel.org/linux-riscv/20250809-fix_clocks_thead_aug_9-v1-1-299c33d7a593@samsung.com/
Icenowy Zheng (4):
clk: thead: add support for enabling/disabling PLLs
clk: thead: support changing DPU pixel clock rate
clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL
clk: thead: th1520-ap: fix parent of padctrl0 clock
drivers/clk/thead/clk-th1520-ap.c | 174 ++++++++++++++++++++++++------
1 file changed, 143 insertions(+), 31 deletions(-)
--
2.50.1
Powered by blists - more mailing lists