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Message-ID: <20250812094741.2040632-1-yangzh0906@thundersoft.com>
Date: Tue, 12 Aug 2025 17:47:41 +0800
From: Albert Yang <yangzh0906@...ndersoft.com>
To: robh@...nel.org
Cc: conor+dt@...nel.org,
devicetree@...r.kernel.org,
krzk+dt@...nel.org,
krzk@...nel.org,
linux-kernel@...r.kernel.org,
yangzh0906@...ndersoft.com
Subject: Re: [PATCH v2 6/8] arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
On Wed, Jul 02, 2025 at 09:19:57AM -0500, Rob Herring wrote:
> On Wed, Jul 02, 2025 at 08:31:33PM +0800, Albert Yang wrote:
> > Before (incorrect):
> > memory@...151000 { reg = <0x8 0x00151000 0x0 0x1000>; };
> > memory@...254000 { reg = <0x8 0x00254000 0x0 0x1000>; };
> > ...
> >
> > After (correct):
> > memory@...151000 {
> > reg = <0x8 0x00151000 0x0 0x1000>,
> > <0x8 0x00254000 0x0 0x1000>,
>
> These are very odd. Are these really main memory vs. some on chip SRAM
> or some other specific purpose?
>
> A 4KB block doesn't really work if the OS uses 16 or 64KB pages, but I
> guess that would be up to the OS to ignore them.
Thank you for pointing out this issue. My colleagues and I have discussed
that these two 4ks are indeed ineffective, so we will remove them in v3
Best Regards,
Albert
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